AD9854AST datasheet(17/52 Pages) AD

17 / 52 page

AD9854

Rev. E | Page 17 of 52

VCO

LOOP

FILTER

PHASE

COMPARATOR

REFERENCE

CLOCK

FILTER

AD9854

DDS

TUNING

WORD

REF CLK IN

FREQUENCY

OUT

DAC OUT

PROGRAMMABLE

DIVIDE-BY-N FUNCTION

(WHERE N = 248/TUNING WORD)

Figure 29. Programmable Fractional Divide-by-N Synthesizer

TUNING

WORD

VCO

LOOP

FILTER

PHASE

COMPARATOR

REF

CLOCK

FREQUENCY

OUT

FILTER

AD9854

DDS

DIVIDE-BY-N

Figure 30. Agile High Frequency Synthesizer

PHASE

SPLITTER

0.8 TO

2.5GHz

AD9854

QUADRATURE

DDS

DDS – LO

DDS

+LO

36dB

TYPICAL

SSB

REJECTION

50Ω

VOUT

AD8346 QUADRATURE

MODULATOR

COSINE (DC TO 70MHz)

SINE (DC TO 70MHz)

NOTES

1. FLIP DDS QUADRATURE SIGNALS TO SELECT ALTERNATE SIDEBAND. ADJUST DDS

SINE OR COSINE SIGNAL AMPLITUDE FOR GREATEST SIDEBAND SUPPRESSION.

DDS DAC OUTPUTS MUST BE LOW-PASS FILTERED PRIOR TO USE WITH THE AD8346.

Figure 31. Single Sideband Upconversion

REFERENCE

CLOCK

50Ω

1:1 TRANSFORMER

(Mini-Circuits® T1-1T)

FILTER

50Ω

DIFFERENTIAL

TRANSFORMER-COUPLED

OUTPUT

AD9854

DDS

IOUT

Figure 32. Differential Output Connection for Reduction of Common-Mode Signals

AD9854AST 数据表(PDF) 17 Page - Analog Devices

AD9854AST 数据表(HTML) 17 Page - Analog Devices

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