EPF10K100 datasheet(10/128 Pages) ALTERA

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Altera Corporation

FLEX 10K Embedded Programmable Logic Device Family Data Sheet

Logic functions are implemented by programming the EAB with a read-

only pattern during configuration, creating a large LUT. With LUTs,

combinatorial functions are implemented by looking up the results, rather

than by computing them. This implementation of combinatorial functions

can be faster than using algorithms implemented in general logic, a

performance advantage that is further enhanced by the fast access times

of EABs. The large capacity of EABs enables designers to implement

complex functions in one logic level without the routing delays associated

with linked LEs or field-programmable gate array (FPGA) RAM blocks.

For example, a single EAB can implement a 4

× 4 multiplier with eight

inputs and eight outputs. Parameterized functions such as LPM functions

can automatically take advantage of the EAB.

The EAB provides advantages over FPGAs, which implement on-board

RAM as arrays of small, distributed RAM blocks. These FPGA RAM

blocks contain delays that are less predictable as the size of the RAM

increases. In addition, FPGA RAM blocks are prone to routing problems

because small blocks of RAM must be connected together to make larger

blocks. In contrast, EABs can be used to implement large, dedicated blocks

of RAM that eliminate these timing and routing concerns.

EABs can be used to implement synchronous RAM, which is easier to use

than asynchronous RAM. A circuit using asynchronous RAM must

generate the RAM write enable (WE) signal, while ensuring that its data

and address signals meet setup and hold time specifications relative to the

signal. In contrast, the EAB’s synchronous RAM generates its own WE

signal and is self-timed with respect to the global clock. A circuit using the

EAB’s self-timed RAM need only meet the setup and hold time

specifications of the global clock.

When used as RAM, each EAB can be configured in any of the following

sizes: 256

× 8, 512 × 4, 1,024 × 2, or 2,048 × 1. See Figure 2.

Figure 2. EAB Memory Configurations

256

× 8

512

× 4

1,024

× 2

2,048

× 1

EPF10K100 数据表(PDF) 10 Page - Altera Corporation

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