EPF10K100 datasheet(2/128 Pages) ALTERA

2 / 128 page

Altera Corporation

FLEX 10K Embedded Programmable Logic Device Family Data Sheet

Note to tables:

(1)

The embedded IEEE Std. 1149.1 JTAG circuitry adds up to 31,250 gates in addition to the listed typical or maximum

system gates.

...and More

Features

–

Devices are fabricated on advanced processes and operate with

a 3.3-V or 5.0-V supply voltage (see Table 3

–

In-circuit reconfigurability (ICR) via external configuration

device, intelligent controller, or JTAG port

–

ClockLockTM and ClockBoostTM options for reduced clock

delay/skew and clock multiplication

–

Built-in low-skew clock distribution trees

–100% functional testing of all devices; test vectors or scan chains

are not required

Table 2. FLEX 10K Device Features

Feature

EPF10K70

EPF10K100

EPF10K100A

EPF10K130V

EPF10K250A

Typical gates (logic and

RAM) (1)

70,000

100,000

130,000

250,000

Maximum system gates

118,000

158,000

211,000

310,000

LEs

3,744

4,992

6,656

12,160

LABs

468

624

832

1,520

EABs

Total RAM bits

18,432

24,576

32,768

40,960

Maximum user I/O pins

358

406

470

Table 3. Supply Voltages for FLEX 10K & FLEX 10KA Devices

5.0-V Devices

3.3-V Devices

EPF10K10

EPF10K20

EPF10K30

EPF10K40

EPF10K50

EPF10K70

EPF10K100

EPF10K10A

EPF10K30A

EPF10K50V

EPF10K100A

EPF10K130V

EPF10K250A

EPF10K100 数据表(PDF) 2 Page - Altera Corporation

EPF10K100 数据表(HTML) 2 Page - Altera Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载