ADRF6750

Rev. A | Page 2 of

40

TABLE OF CONTENTS

Features .............................................................................................. 1

 

General Description ......................................................................... 1

 

Functional Block Diagram .............................................................. 1

 

Revision History ............................................................................... 2

 

Specifications..................................................................................... 3

 

Timing Characteristics ................................................................ 5

 

Absolute Maximum Ratings............................................................ 7

 

ESD Caution.................................................................................. 7

 

Pin Configuration and Function Descriptions............................. 8

 

Typical Performance Characteristics ........................................... 10

 

Theory of Operation ...................................................................... 18

 

Overview...................................................................................... 18

 

PLL Synthesizer and VCO......................................................... 18

 

Quadrature Modulator .............................................................. 20

 

Attenuator.................................................................................... 21

 

Voltage Regulator ....................................................................... 21

 

EXTERNAL vco OPERATION ................................................ 21

 

I2C Interface ................................................................................ 21

 

SPI Interface ................................................................................ 23

 

Program Modes .......................................................................... 25

 

Register Map ................................................................................... 27

 

Register Map Summary ............................................................. 27

 

Register Bit Descriptions........................................................... 28

 

Suggested Power-Up Sequence..................................................... 31

 

Initial Register Write Sequence ................................................ 31

 

Evaluation Board ............................................................................ 32

 

General Description................................................................... 32

 

Hardware Description ............................................................... 32

 

PCB Artwork............................................................................... 35

 

Bill of Materials........................................................................... 38

 

Outline Dimensions ....................................................................... 39

 

Ordering Guide .......................................................................... 39

 

REVISION HISTORY

4/10—Rev. 0 to Rev. A

Changes to Table 5............................................................................ 9

Changes to LOMON Outputs Section......................................... 33

Changes to Ordering Guide .......................................................... 39

1/10—Revision 0: Initial Version