DSPIC30F0010AT-20ESLASHPF datasheet(102/236 Pages) MICROCHIP

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dsPIC30F6010A/6015

DS70150C-page 100

15.11 PWM Output and Polarity Control

There are three device Configuration bits associated

with the PWM module that provide PWM output pin

control:

• HPOL Configuration bit

• LPOL Configuration bit

• PWMPIN Configuration bit

These three bits in the FPORBOR Configuration regis-

ter (see Section 21.0 “System Integration”) work in

conjunction with the four PWM Enable bits (PENxH and

PENxL) located in the PWMCON1 SFR. The Configu-

ration bits and PWM Enable bits ensure that the PWM

pins are in the correct states after a device Reset

occurs. The PWMPIN configuration fuse allows the

PWM module outputs to be optionally enabled on a

device Reset. If PWMPIN = 0, the PWM outputs will be

driven to their inactive states at Reset. If PWMPIN = 1

(default), the PWM outputs will be tri-stated. The HPOL

bit specifies the polarity for the PWMxH outputs,

whereas the LPOL bit specifies the polarity for the

PWMxL outputs.

15.11.1

OUTPUT PIN CONTROL

The PEN<4:1>H and PEN<4:1>L control bits in the

PWMCON1 SFR enable each high PWM output pin

and each low PWM output pin, respectively. If a partic-

ular PWM output pin is not enabled, it is treated as a

general purpose I/O pin.

15.12 PWM Fault Pins

There are two Fault pins (FLTA and FLTB) associated

with the PWM module. When asserted, these pins can

optionally drive each of the PWM I/O pins to a defined

state.

15.12.1

FAULT PIN ENABLE BITS

The FLTACON and FLTBCON SFRs each have 4 con-

trol bits that determine whether a particular pair of

PWM I/O pins is to be controlled by the Fault input pin.

To enable a specific PWM I/O pin pair for Fault

overrides, the corresponding bit should be set in the

FLTACON or FLTBCON register.

If all enable bits are cleared in the FLTACON or

FLTBCON registers, then the corresponding Fault input

pin has no effect on the PWM module and the pin may

be used as a general purpose interrupt or I/O pin.

15.12.2

FAULT STATES

The FLTACON and FLTBCON Special Function Regis-

ters have 8 bits each that determine the state of each

PWM I/O pin when it is overridden by a Fault input.

When these bits are cleared, the PWM I/O pin is driven

to the inactive state. If the bit is set, the PWM I/O pin

will be driven to the active state. The active and inactive

states are referenced to the polarity defined for each

PWM I/O pin (HPOL and LPOL polarity control bits).

A special case exists when a PWM module I/O pair is

in the Complementary mode and both pins are pro-

grammed to be active on a Fault condition. The

PWMxH pin always has priority in the Complementary

mode, so that both I/O pins cannot be driven active

simultaneously.

15.12.3

FAULT PIN PRIORITY

If both Fault input pins have been assigned to control a

particular PWM I/O pin, the Fault state programmed for

the Fault A input pin will take priority over the Fault B

input pin.

15.12.4

FAULT INPUT MODES

Each of the Fault input pins has two modes of

operation:

• Latched Mode: When the Fault pin is driven low,

the PWM outputs will go to the states defined in

the FLTACON/FLTBCON register. The PWM out-

puts will remain in this state until the Fault pin is

driven high and the corresponding interrupt flag

has been cleared in software. When both of these

actions have occurred, the PWM outputs will

return to normal operation at the beginning of the

next PWM cycle or half-cycle boundary. If the

interrupt flag is cleared before the Fault condition

ends, the PWM module will wait until the Fault pin

is no longer asserted, to restore the outputs.

• Cycle-by-Cycle Mode: When the Fault input pin

is driven low, the PWM outputs remain in the

defined Fault states for as long as the Fault pin is

held low. After the Fault pin is driven high, the

PWM outputs return to normal operation at the

beginning of the following PWM cycle or

half-cycle boundary.

The Operating mode for each Fault input pin is selected

using the FLTAM and FLTBM control bits in the

FLTACON and FLTBCON Special Function Registers.

Each of the Fault pins can be controlled manually in

software.

Note:

The Fault pin logic can operate indepen-

dent of the PWM logic. If all the enable bits

in the FLTACON/FLTBCON register are

cleared, then the Fault pin(s) could be

used as general purpose interrupt pin(s).

Each Fault pin has an interrupt vector,

Interrupt Flag bit and Interrupt Priority bits

associated with it.

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