DSPIC30F0010AT-20ESLASHPF datasheet(99/236 Pages) MICROCHIP

99 / 236 page

DS70150C-page 97

dsPIC30F6010A/6015

15.4

Center-Aligned PWM

Center-aligned PWM signals are produced by the mod-

ule when the PWM time base is configured in an Up/

Down Counting mode (see Figure 15-3).

The PWM compare output is driven to the active state

when the value of the Duty Cycle register matches the

value of PTMR and the PWM time base is counting

downwards (PTDIR = 1). The PWM compare output is

driven to the inactive state when the PWM time base is

counting upwards (PTDIR = 0) and the value in the

PTMR register matches the duty cycle value.

If the value in a particular Duty Cycle register is zero,

then the output on the corresponding PWM pin will be

inactive for the entire PWM period. In addition, the out-

put on the PWM pin will be active for the entire PWM

period if the value in the Duty Cycle register is equal to

the value held in the PTPER register.

FIGURE 15-3:

CENTER-ALIGNED PWM

15.5

PWM Duty Cycle Comparison

Units

There are four 16-bit Special Function Registers

(PDC1, PDC2, PDC3 and PDC4) used to specify duty

cycle values for the PWM module.

The value in each Duty Cycle register determines the

amount of time that the PWM output is in the active

state. The Duty Cycle registers are 16-bits wide. The

LSb of a Duty Cycle register determines whether the

PWM edge occurs in the beginning. Thus, the PWM

resolution is effectively doubled.

15.5.1

DUTY CYCLE REGISTER BUFFERS

The four PWM Duty Cycle registers are double-

buffered to allow glitchless updates of the PWM

outputs. For each duty cycle, there is a Duty Cycle reg-

ister that is accessible by the user and a second Duty

Cycle register that holds the actual compare value

used in the present PWM period.

For edge-aligned PWM output, a new duty cycle value

will be updated whenever a match with the PTPER reg-

ister occurs and PTMR is reset. The contents of the

duty cycle buffers are automatically loaded into the

Duty Cycle registers when the PWM time base is dis-

abled (PTEN = 0) and the UDIS bit is cleared in

PWMCON2.

When the PWM time base is in the Up/Down Counting

mode, new duty cycle values are updated when the

value of the PTMR register is zero and the PWM time

base begins to count upwards. The contents of the duty

cycle buffers are automatically loaded into the Duty

Cycle registers when the PWM time base is disabled

(PTEN = 0).

When the PWM time base is in the Up/Down Counting

mode with double updates, new duty cycle values are

updated when the value of the PTMR register is zero,

and when the value of the PTMR register matches the

value in the PTPER register. The contents of the duty

cycle buffers are automatically loaded into the Duty

Cycle registers when the PWM time base is disabled

(PTEN = 0).

15.5.2

DUTY CYCLE IMMEDIATE

UPDATES

When the Immediate Update Enable bit is set (IUE = 1),

any write to the Duty Cycle registers will update the

new duty cycle value immediately. This feature gives

the option to the user to allow immediate updates of the

active PWM Duty Cycle registers instead of waiting for

the end of the current time base period. System stabil-

ity is improved in closed loop servo applications by

reducing the delay between system observation and

the issuance of system corrective commands when

immediate updates are enabled (IUE = 1).

If the PWM output is active at the time the new duty

cycle is written and the new duty cycle is less than the

current time base value, the PWM pulse width will be

shortened. If the PWM output is active at the time the

new duty cycle is written and the new duty cycle is

greater than the current time base value, the PWM

pulse width will be lengthened.

If the PWM output is inactive at the time the new duty

cycle is written and the new duty cycle is greater than

the current time base value, the PWM output will

become active immediately and will remain active for

the new written duty cycle value.

PTPER

PTMR

Value

Period

Period/2

Duty

Cycle

DSPIC30F0010AT-20E/PF 数据表(PDF) 99 Page - Microchip Technology

DSPIC30F0010AT-20E/PF 数据表(HTML) 99 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载