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MPC8323CVRAFDCA 数据表(PDF) 29 Page - Freescale Semiconductor, Inc |
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MPC8323CVRAFDCA 数据表(HTML) 29 Page - Freescale Semiconductor, Inc |
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29 / 82 page ![]() MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4 Freescale Semiconductor 29 JTAG Figure 17. Local Bus Signals, GPCM/UPM Signals for LCRR[CLKDIV] = 4 10 JTAG This section describes the DC and AC electrical specifications for the IEEE Std. 1149.1™ (JTAG) interface of the MPC8323E. 10.1 JTAG DC Electrical Characteristics Table 31 provides the DC electrical characteristics for the IEEE Std. 1149.1 (JTAG) interface of the MPC8323E. Table 31. JTAG Interface DC Electrical Characteristics Characteristic Symbol Condition Min Max Unit Output high voltage VOH IOH = –6.0 mA 2.4 — V Output low voltage VOL IOL = 6.0 mA — 0.5 V Output low voltage VOL IOL = 3.2 mA — 0.4 V Input high voltage VIH —2.5 OVDD +0.3 V LCLK UPM Mode Input Signal: LUPWAIT tLBIXKH tLBIVKH tLBIVKH tLBIXKH tLBKHOZ T1 T3 UPM Mode Output Signals: LCS[0:3]/LBS[0:1]/LGPL[0:5] GPCM Mode Output Signals: LCS[0:3]/LWE tLBKHOV tLBKHOV tLBKHOZ T2 T4 Input Signals: LAD[0:15] |
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