MPC8323CVRAFDCA datasheet(78/82 Pages) FREESCALE

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MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4

Freescale Semiconductor

System Design Information

output impedance is the average of two components, the resistances of the pull-up and pull-down devices.

When data is held high, SW1 is closed (SW2 is open) and RP is trimmed until the voltage at the pad equals

OVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be close to each

other in value. Then, Z0 = (RP + RN)/2.

Figure 45. Driver Impedance Measurement

The value of this resistance and the strength of the driver’s current source can be found by making two

measurements. First, the output voltage is measured while driving logic 1 without an external differential

termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured

while driving logic 1 with an external precision differential termination resistor of value Rterm. The

measured voltage is V2 =(1/(1/R1 +1/R2)) × Isource. Solving for the output impedance gives Rsource =

Rterm × (V1/V2 – 1). The drive current is then Isource =V1/Rsource.

Table 65 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD,

nominal OVDD, 105°C.

24.6

Configuration Pin Multiplexing

The MPC8323E provides the user with power-on configuration options which can be set through the use

of external pull-up or pull-down resistors of 4.7 k

Ω on certain output pins (see customer visible

configuration pins). These pins are generally used as output only pins in normal operation.

Table 65. Impedance Characteristics

Impedance

Local Bus, Ethernet, DUART, Control,

Configuration, Power Management

PCI

DDR DRAM

Symbol

Unit

42 Target

25 Target

20 Target

42 Target

25 Target

20 Target

Differential

ZDIFF

Note: Nominal supply voltages. See Table 1, Tj = 105°C.

OVDD

OGND

Pad

Data

SW1

SW2

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