Product Specification

PE9701

Page 7 of 13

Document No. 70-0035-02

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©2003-2006 Peregrine Semiconductor Corp. All rights reserved.

Functional Description

The PE9701 consists of a prescaler, counters, a

phase detector, a charge pump, and control logic.

The dual modulus prescaler divides the VCO

frequency by either 10 or 11, depending on the

value of the modulus select. Counters “R” and

“M” divide the reference and prescaler output,

respectively, by integer values stored in a 20-bit

register. An additional counter (“A”) is used in the

modulus select logic. The phase-frequency

detector generates up and down frequency control

signals. The control logic includes a selectable

chip interface. Data can be written via serial bus,

parallel bus, or hardwired directly to the pins.

There are also various operational and test modes

and a lock detect output.

Figure 4. Functional Block Diagram

Control

Logic

Modulus

Select

10/11

Prescaler

M Counter

(9-bit)

R Counter

(6-bit)

Phase

Detector

2 k

Ω

PD_U

PD_D

LD

Cext

R(5:0)

M(8:0)

A(3:0)

D(7:0)

Sdata

Control

Pins

Charge

Pump

CP