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ADE7978 数据表(PDF) 19 Page - Analog Devices |
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ADE7978 数据表(HTML) 19 Page - Analog Devices |
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19 / 120 page ![]() Data Sheet ADE7978/ADE7933/ADE7932 Rev. 0 | Page 19 of 120 ADE7932/ ADE7933 TOP VIEW (Not to Scale) VDDISO 1 GNDISO 2 V2P 3 V1P 4 GND 20 VDD 19 EMI_CTRL 18 V2/TEMP 17 VM 5 RESET_EN 16 IM 6 DATA 15 IP 7 XTAL2 14 LDO 8 XTAL1 13 REF 9 SYNC 12 GNDISO 10 GND 11 Figure 11. Pin Configuration, ADE7933/ADE7932 Table 14. Pin Function Descriptions, ADE7933/ADE7932 Pin No. Mnemonic Description 1 VDDISO Isolated Secondary Side Supply Voltage. This pin provides access to the 3.3 V on-chip isolated power supply. Do not connect active external circuitry to this pin. Decouple this pin with a 10 µF capacitor in parallel with a ceramic 0.1 µF capacitor. 2, 10 GNDISO Ground Reference for the Isolated Secondary Side. This pin provides the ground reference for the analog circuitry. Use this quiet ground reference for all analog circuitry. 3, 4, 5 V2P, V1P, VM Analog Inputs for the Voltage Channels. These channels are used with voltage transducers and are referred to in this data sheet as the voltage channels. These inputs are pseudo differential voltage inputs with a maximum signal level of ±0.5 V with respect to VM for specified operation. Use these pins with the related input circuitry, as shown in Figure 34. The second voltage channel (V2P) is available on the ADE7933 only. If the V1P or V2P pin is not used on the ADE7933, connect the pin to the VM pin. On the ADE7932, the V2P pin must always be connected to the VM pin. 6, 7 IM, IP Analog Inputs for the Current Channel. This channel is used with shunts and is referred to in this data sheet as the current channel. These inputs are pseudo differential voltage inputs with a maximum differential level of ±31.25 mV. Use these pins with the related input circuitry, as shown in Figure 34. 8 LDO 2.5 V Output of the Analog Low Dropout (LDO) Regulator. Decouple this pin with a 4.7 µF capacitor in parallel with a ceramic 100 nF capacitor using GNDISO (Pin 10). Do not connect active external circuitry to this pin. 9 REF Voltage Reference. This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 1.2 V. Decouple this pin to GNDISO (Pin 10) with a 4.7 µF capacitor in parallel with a ceramic 100 nF capacitor. 11, 20 GND Primary Ground Reference. 12 SYNC Synchronization Pin. The 4.096 MHz clock signal generated by the ADE7978 is used for serial communication between the ADE7933/ADE7932 and the ADE7978. Connect the ADE7933/ADE7932 SYNC pin to the SYNC pin of the ADE7978. 13 XTAL1 Master Clock. Connect this pin to the ADE7978 CLKOUT pin. The clock frequency for specified operation is 4.096 MHz. When the ADE7933/ADE7932 and the ADE7978 are used as a chipset, the ADE7933/ADE7932 must function synchronously with the ADE7978; therefore, the XTAL1 pin of the ADE7933/ADE7932 must be connected to the CLKOUT pin of the ADE7978. If the ADE7933/ADE7932 are used as standalone chips, a crystal with a maxi- mum drive level of 0.5 mW and an ESR of 20 Ω can be connected across XTAL1 and XTAL2 to provide a clock source for the ADE7933/ADE7932. The clock frequency for specified operation is 4.096 MHz, but lower frequencies down to 3.6 MHz can be used. For more information, see the ADE7978 and ADE7933/ADE7932 Clocks section. 14 XTAL2 Leave this pin open when the ADE7933/ADE7932 are used with the ADE7978. If the ADE7933/ADE7932 are used as standalone chips, a crystal with a maximum drive level of 0.5 mW and an ESR of 20 Ω can be connected across XTAL1 and XTAL2 to provide a clock source for the ADE7933/ADE7932. 15 DATA Data Output for Communication with the ADE7978. Connect the DATA pin to one of the following pins on the ADE7978: DATA_A, DATA_B, DATA_C, or DATA_N. Connect the DATA pin of the Phase A ADE7933/ADE7932 to the DATA_A pin of the ADE7978, and so on. 16 RESET_EN Reset Input Enable, Active Low. The ADE7933/ADE7932 is reset by setting the RESET_EN pin low and toggling the V2/TEMP pin four times with a frequency of 4.096 MHz. The reset ends when this pin and the V2/TEMP pin are set high (see the Hardware Reset section). 17 V2/TEMP This input pin selects the signal that is converted at the second voltage channel of the ADE7933. (In the ADE7932, the temperature sensor is always converted by the second voltage channel.) When this pin is high, the voltage input V2P is sensed; when this pin is low, the temperature sensor is measured. The V2/TEMP pin is also used during the ADE7933/ADE7932 reset procedure. For both the ADE7933 and ADE7932, the V2/TEMP pin must always be connected to one of the following pins on the ADE7978: VT_A, VT_B, VT_C, or VT_N. Connect the V2/TEMP pin of the Phase A ADE7933/ADE7932 to the VT_A pin of the ADE7978, and so on. For more information, see the Second Voltage Channel and Temperature Measurement section. |
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