STM32F373VC datasheet(24/131 Pages) STMICROELECTRONICS

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Functional overview

STM32F37xxx

24/131

DocID022691 Rev 4

The RTC is an independent BCD timer/counter. Its main features are the following:

•

Calendar with subsecond, seconds, minutes, hours (12 or 24 format), week day, date,

month, year, in BCD (binary-coded decimal) format.

•

Automatic correction for 28th, 29th (leap year), 30th and 31st day of the month.

•

2 programmable alarms with wake up from Stop and Standby mode capability.

•

Periodic wakeup unit with programmable resolution and period.

•

On-the-fly correction from 1 to 32767 RTC clock pulses. This can be used to

synchronize it with a master clock.

•

Digital calibration circuit with 1 ppm resolution, to compensate for quartz crystal

inaccuracy.

•

3 anti-tamper detection pins with programmable filter. The MCU can be woken up from

Stop and Standby modes on tamper event detection.

•

Timestamp feature which can be used to save the calendar content. This function can

triggered by an event on the timestamp pin, or by a tamper event. The MCU can be

woken up from Stop and Standby modes on timestamp event detection.

•

Reference clock detection: a more precise second source clock (50 or 60 Hz) can be

used to enhance the calendar precision.

The RTC clock sources can be:

•

A 32.768 kHz external crystal

•

A resonator or oscillator

•

The internal low-power RC oscillator (typical frequency of 40 kHz)

•

The high-speed external clock divided by 32

3.19

Inter-integrated circuit interface (I2C)

Up to two I2C bus interfaces can operate in multimaster and slave modes. They can support

standard (up to 100 kHz), fast (up to 400 kHz) and fast mode + (up to 1 MHz) modes with

20 mA output drive. They support 7-bit and 10-bit addressing modes, multiple 7-bit slave

addresses (2 addresses, 1 with configurable mask). They also include programmable

analog and digital noise filters.

In addition, they provide hardware support for SMBUS 2.0 and PMBUS 1.1: ARP capability,

Host notify protocol, hardware CRC (PEC) generation/verification, timeout verifications and

Table 6. Comparison of I2C analog and digital filters

Analog filter

Digital filter

Pulse width of

suppressed spikes

≥ 50 ns

Programmable length from 1 to 15

I2C peripheral clocks

Benefits

Available in Stop mode

1. Extra filtering capability vs.

standard requirements.

2. Stable length

Drawbacks

Variations depending on

temperature, voltage, process

Wakeup from Stop on address

match is not available when digital

filter is enabled

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