Am29F100

33

ERASE AND PROGRAMMING PERFORMANCE

Notes:

1. Typical program and erase times assume the following conditions: 25

programming typicals assume checkerboard pattern.

3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes

program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded, only then

does the device set DQ5 = 1. See the section on DQ5 for further information.

4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See Table 1

for further information on command definitions.

6. The device has a guaranteed minimum erase and program cycle endurance of 100,000 cycles.

LATCHUP CHARACTERISTIC

TSOP AND SO PIN CAPACITANCE

Notes:

1. Sampled, not 100% tested.

DATA RETENTION

Parameter

Limits

Comments

Typ (Note 1)

Max (Note 2)

Unit

Chip/Sector Erase Time

1.5

15

sec

Excludes 00h programming prior to

erasure (Note 4)

Byte Programming Time

14

1000

µs

Excludes system-level overhead

(Note 5)

Word Programming Time

28

2000

µs

Chip Programming Time (Note 3)

1.8

12.5

sec

Parameter Description

Min

Max

–1.0 V

–100 mA

+100 mA

Parameter

Symbol

Parameter Description

Test Conditions

Typ

Max

Unit

Input Capacitance

6

7.5

pF

Output Capacitance

8.5

12

pF

Control Pin Capacitance

8

10

pF

Parameter Description

Test Conditions

Min

Unit

Minimum Pattern Data Retention Time

150

°C

10

Years

125

°C

20

Years