Am29F400AT/Am29F400AB

33

PRELIMINARY

SWITCHING WAVEFORMS

Notes:

1. PA is address of the memory location to be programmed.

2. PD is data to be programmed at byte address.

3. DQ7 is the output of the complement of the data written to the device.

5. Figure indicates last two bus cycles of four bus cycle sequence.

6. These waveforms are for the x16 mode.

Figure 19.

Alternate CE Controlled Program Operation Timings

ERASE AND PROGRAMMING PERFORMANCE

Notes:

1. 25

°C, 5.0 V V

2. Although Embedded Algorithms allow for longer chip program and erase time, the actual time will be considerably less since

bytes program or erase significantly faster than the worst case byte.

3. Under worst case condition of 90

°C, 4.5 V V

4. System-level overhead is defined as the time required to execute the four bus cycle command necessary to program each

byte. In the preprogramming step of the Embedded Erase algorithm, all bytes are programmed to 00H before erasure.

5. The Embedded Algorithms allow for 2.5 ms byte program time. DQ5 = “1” only after a byte takes the theoretical maximum time

to program. A minimal number of bytes may require significantly more programming pulses than the typical byte. The majority

of the bytes will program within one or two pulses. This is demonstrated by the Typical and Maximum Programming Times

listed above.

Parameter

Limits

Unit

Comments

Typ (Note 1)

Max

Sector Erase Time

1.0

8

sec

Excludes 00H programming prior to erasure

Chip Erase Time

11

88

sec

Excludes 00H programming prior to erasure

Byte Programming Time

7

300 (Note 3)

µs

Excludes system-level overhead (Note 4)

Word Programming Time

14

600

µs

Excludes system-level overhead (Note 4)

Chip Programming Time

3.6

10.8 (Notes 3, 5)

sec

Excludes system-level overhead (Note 4)

PD

Data Polling

Addresses

WE

OE

CE

Data

5.0 Volt

DQ7

5555H

PA

A0H

PA

20380B-26