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AM7968-125JC 数据表(PDF) 41 Page - Advanced Micro Devices |
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AM7968-125JC 数据表(HTML) 41 Page - Advanced Micro Devices |
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41 / 127 page  AMD 37 Am7968/Am7969-125 Military Am7969-125 Military TAXIchip Receiver (Notes 13, 14, 22) t35 n Parameter No. Symbol Parameter Description Test Conditions Min Max Unit Bus Interface Signals: DO0–DO7, DO8/CO3, DO9/CO2, CO0–CO1, DSTRB, CSTRB, IGM, CLK, CNB, VLTN 35 tP CLK Period (Note 24) 8 n 25 n ns 36 tPD Data Valid to STRB ↑ Delay TTL Output Load ns 37 tPD CLK ↓ to STRB↑ TTL Output Load ns 38 tPD CLK ↑ to STRB↓ TTL Output Load ns 38a tPD STRB ↑ to CLK↑ (Note 23) TTL Output Load ns 39 tPD CLK ↓ to Data Valid Delay TTL Output Load ns 40 tPW STRB Pulse Width HIGH TTL Output Load ns 41 tPW CLK Pulse Width HIGH TTL Output Load ns 42 tPW CLK Pulse Width LOW TTL Output Load ns 43 tPD SERIN to CLK ↓ Delay TTL Output Load ns Serial Interface Signals: SERIN+, SERIN– 57 tJ ¦ SERIN ± Peak to Peak Input Jitter 5 ns Tolerance (Note 16) Miscellaneous Signals: X1 (Note 15) 60 tPW X1 Pulse Width HIGH 35 ns 61 tPW X1 Pulse Width LOW 35 ns 2t35 n 2t35 n +15 t35 n –7 5t35 2n 5t35 n –15 5t35 2n –15 + - 23 5t35 n 3t35 n –14 t35 2n +17 2t35 n +26 Note: CLK (pin 19) must be connected to CNB (pin 24). |
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