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STM32F103RG 数据表(PDF) 65 Page - STMicroelectronics

部件名 STM32F103RG
功能描述  XL-density performance line ARM-based 32-bit MCU
PDF  120 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F103RG 数据表(HTML) 65 Page - STMicroelectronics

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STM32F103xF, STM32F103xG
Electrical characteristics
Doc ID 16554 Rev 3
65/120
Figure 24.
Asynchronous multiplexed PSRAM/NOR read waveforms
Table 34.
Asynchronous multiplexed PSRAM/NOR read timings(1)
1.
CL = 15 pF.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
7tHCLK + 0.5
7tHCLK + 2
ns
tv(NOE_NE)
FSMC_NEx low to FSMC_NOE low
3tHCLK + 0.5
3tHCLK + 1.5
ns
tw(NOE)
FSMC_NOE low time
4tHCLK – 1
4tHCLK + 1
ns
th(NE_NOE)
FSMC_NOE high to FSMC_NE high hold time
0.5
-
ns
tv(A_NE)
FSMC_NEx low to FSMC_A valid
-
0
ns
tv(NADV_NE)
FSMC_NEx low to FSMC_NADV low
0
1
ns
tw(NADV)
FSMC_NADV low time
tHCLK + 0.5
tHCLK + 2
ns
th(AD_NADV)
FSMC_AD (address) valid hold time after
FSMC_NADV high
tHCLK
-
ns
th(A_NOE)
Address hold time after FSMC_NOE high
tHCLK -2
-
ns
th(BL_NOE)
FSMC_BL hold time after FSMC_NOE high
0.5
-
ns
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
-
0
ns
tsu(Data_NE)
Data to FSMC_NEx high setup time
4tHCLK - 0.5
-
ns
tsu(Data_NOE) Data to FSMC_NOE high setup time
4tHCLK - 1
-
ns
th(Data_NE)
Data hold time after FSMC_NEx high
0
-
ns
th(Data_NOE)
Data hold time after FSMC_NOE high
0
-
ns
NBL
Data
FSMC_NBL[1:0]
FSMC_AD[15:0]
tv(BL_NE)
th(Data_NE)
Address
FSMC_A[25:16]
tv(A_NE)
FSMC_NWE
t v(A_NE)
ai14892b
Address
FSMC_NADV
t v(NADV_NE)
tw(NADV)
tsu(Data_NE)
th(AD_NADV)
FSMC_NE
FSMC_NOE
tw(NE)
t w(NOE)
tv(NOE_NE)
t h(NE_NOE)
th(A_NOE)
th(BL_NOE)
tsu(Data_NOE)
th(Data_NOE)



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