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STM32F415VG 数据表(PDF) 85 Page - STMicroelectronics |
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STM32F415VG 数据表(HTML) 85 Page - STMicroelectronics |
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85 / 186 page ![]() DocID022063 Rev 4 85/186 STM32F415xx, STM32F417xx Electrical characteristics Table 21. Typical and maximum current consumption in Run mode, code with data processing running from Flash memory (ART accelerator disabled) Symbol Parameter Conditions fHCLK Typ Max(1) Unit TA = 25 °C TA = 85 °C TA = 105 °C IDD Supply current in Run mode External clock(2), all peripherals enabled(3)(4) 168 MHz 93 109 117 mA 144 MHz 76 89 96 120 MHz 67 79 86 90 MHz 53 65 73 60 MHz 37 49 56 30 MHz 20 32 39 25 MHz 16 27 35 16 MHz 11 23 30 8 MHz 6 18 25 4 MHz 4 16 23 2 MHz 3 15 22 External clock(2), all peripherals disabled(3)(4) 168 MHz 46 61 69 144 MHz 40 52 60 120 MHz 37 48 56 90 MHz 30 42 50 60 MHz 22 33 41 30 MHz 12 24 31 25 MHz 10 21 29 16 MHz 7 19 26 8 MHz 4 16 23 4 MHz 3 15 22 2 MHz 2 14 21 1. Based on characterization, tested in production at VDD max and fHCLK max with peripherals enabled. 2. External clock is 4 MHz and PLL is on when fHCLK > 25 MHz. 3. When analog peripheral blocks such as (ADCs, DACs, HSE, LSE, HSI,LSI) are on, an additional power consumption should be considered. 4. When the ADC is ON (ADON bit set in the ADC_CR2 register), add an additional power consumption of 1.6 mA per ADC for the analog part. |
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