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STM32F415VG 数据表(PDF) 174 Page - STMicroelectronics |
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STM32F415VG 数据表(HTML) 174 Page - STMicroelectronics |
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174 / 186 page ![]() Application block diagrams STM32F415xx, STM32F417xx 174/186 DocID022063 Rev 4 A.2 USB OTG high speed (HS) interface solutions Figure 89. USB controller configured as peripheral, host, or dual-mode and used in high speed mode 1. It is possible to use MCO1 or MCO2 to save a crystal. It is however not mandatory to clock the STM32F41x with a 24 or 26 MHz crystal when using USB HS. The above figure only shows an example of a possible connection. 2. The ID pin is required in dual role only. DP STM32F4xx DM VBUS VSS DM DP ID(2) USB USB HS OTG Ctrl FS PHY ULPI High speed OTG PHY ULPI_CLK ULPI_D[7:0] ULPI_DIR ULPI_STP ULPI_NXT not connected connector MCO1 or MCO2 24 or 26 MHz XT(1) PLL XT1 XI MS19005V2 |
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