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AS8501 数据表(PDF) 34 Page - ams AG |
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AS8501 数据表(HTML) 34 Page - ams AG |
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34 / 41 page ![]() AS8501 - Data Sheet austriamicrosystems Revision 1.1, 04-April-06 www.austriamicrosystems.com Page 33 of 40 8.6.2 Stored ZZR-register mapping ZZR-Register ZZR subregister 1098 76 543 210 msb lsb ZLO xxx xx 187 183 TRIMC x x x x x 182 178 current source calibration TRIMA x x x x x 177 173 PGA offset calibration TRIMBV xxx xx 172 168 reference voltage calibration TRIMBTC xxx xx 167 163 TC calibration CGI1 c0 c0 c0 c0 c0 c0 c0 c0 c0 c0 c0 162 152 gain 6 currrent 1500A CGI2 c1 c1 c1 c1 c1 c1 c1 c1 c1 c1 c1 151 141 gain 24 current 300 A CGI3 c2 c2 c2 c2 c2 c2 c2 c2 c2 c2 c2 140 130 gain 50 current 150 A CGI4 00 00 000 00 00 129 119 gain100 current 75 A CAU0 c1 c1 c1 c1 c1 c1 c1 c1 c1 c1 c1 118 108 calibration factor for gain 24 CAU1 11 11 111 11 11 107 97 CAU2 11 11 111 11 11 96 86 CAU3 c4 c4 c4 c4 c4 c4 c4 c4 c4 c4 c4 85 75 calibration factor for gain 1 CAU4 c3 c3 c3 c3 c3 c3 c3 c3 c3 c3 c3 74 64 calibration factor for gain 100 CAU5 ct ct ct ct ct ct ct ct ct ct ct 63 53 calibration factor for internal temperature TCU1 1 cs cs cs cs cs cs cs cs 52 44 8 bits for checksum 1) TCU0 1 1 1 fi fififififi 43 35 6 bits for internal clock 2) TRT0 ttt tt ttt tt t 34 24 11 bits for internal temperature at 23°C TCN3 n23 n n n n n n n 23 16 high byte for serial number TCN2 n nnn nn nn 15 8 medium byte for serial number TCN1 n n n n n n n n0 7 0 low byte for serial number x = these fields are written during calibration c0 = these fields are written during calibration of G6 c1 = these fields are written during calibration of G24 (i.e. 30 mV = 30 000 digits) 0 = Zero value of calibration constant for detection of unwanted POR ct = calibration factor for slope of Tint : 75 digits/deg cs = 8-Bit checksum for ZZR-register fi = 6-bit for calibration of internal clock t = 11 bits for Tint value at 23 °C nr = 24 bits serial number ZTC bit no. in subregister ZZR-bits remarks ZCL ZTR Notes: 1) The checksum contains the added value of all bits in the ZZR register without the 6 checksum bits 2) Tthe internal clock frequency can be calculated int_fclk= (240 + 6-bit fi-number) kHz |
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