EM260-RTR datasheet(27/50 Pages) SILICONIMAGE

27 / 50 page

EM260

Page 27

120-0260-000M Rev 1.1

corrupt command. For example, if the EM260 resets during the Response Section, the Host will still clock out

the correct number of bytes. But when the host attempts to verify the value 0xA7 at the end of the Response,

it will see either the value 0x00 or 0xFF and know that the EM260 just reset and the corrupt Response should

be discarded.

Note: The Length Byte only specifies the length of the Payload Frame. It does not include the Frame

Terminator.

5.5

SPI Byte

Table 15 lists the possible commands and their responses in the SPI Byte.

Table 15. SPI Commands & Reponses

Command

Value

Command

Response

Value

Response

Any

0x00

EM260 reset occurred—This is never used in

another Response; it always indicates an EM260

Reset.

Any

0x01

Oversized Payload Frame received—This is never

used in another Response; it always indicates an

overflow occurred.

Any

0x02

Aborted Transaction occurred—This is never

used in another Response; it always indicates an

aborted transaction occurred.

Any

0x03

Missing Frame Terminator—This is never used in

another Response; it always indicates a Missing

Frame Terminator in the Command.

Any

0x04

Unsupported SPI Command—This is never used in

another Response; it always indicates an

unsupported SPI Byte in the Command.

0x00 – 0x09

Reserved

[none]

0x0A

SPI Protocol

Version

0x81 – 0xBF

bit[7] is always set. bit[6] is always cleared.

bit[5:0] is a number from 1–63.

0x0B

SPI Status

0xC0 – 0xC1

bit[7] is always set. bit[6] is always set. bit[0]—

Set if Alive.

0x0C – 0xFC

Reserved

[none]

0xFD

Bootloader

Frame

0xFD

Bootloader Frame

0xFE

EZSP Frame

0xFE

EZSP Frame

0xFF

Invalid

0xFF

Invalid

5.5.1

Primary SPI Bytes

There are four primary SPI Bytes: SPI Protocol Version, SPI Status, Bootloader Frame, and EZSP Frame.

SPI Protocol Version [0x0A]: Sending this command requests the SPI Protocol Version number from the SPI

Interface. The response will always have bit 7 set and bit 6 cleared. In this current version, the response

EM260-RTR 数据表(PDF) 27 Page - Silicon image

EM260-RTR 数据表(HTML) 27 Page - Silicon image

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

数据表下载