EM260-RTR datasheet(37/50 Pages) SILICONIMAGE

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EM260

Page 37

120-0260-000M Rev 1.1

SIF Module Programming and Debug Interface

SIF is a synchronous serial interface developed by Cambridge Consultants Ltd. It is the primary programming

and debug interface of the EM260. The SIF module allows external devices to read and write memory-mapped

registers in real-time without changing the functionality or timing of the XAP2b core. See document AN696,

PCB Design with an EM260, for the PCB-level design details regarding the implementation of the SIF interface.

The EM260 pins involved in the SIF Interface:

nSIF_LOAD

SIF_CLK

SIF_MOSI

SIF_MISO



nRESET

In addition, the VDD_PADS and Ground Net are required for external voltage translation and buffering of the

SIF Signals.

The SIF interface provides the following:

PCB production test interface via Virtual UART and a Debug Adapter (ISA)

Programming and debug interface during EmberZNet application development

In order to achieve the deep sleep currents specified in Table 5, a pull-down resistor must be connected to

the SIF_MOSI pin. In addition, Silicon Labs recommends a pull-up resistor to be placed on the nSIF_LOAD pin in

order to prevent noise from coupling onto the signal. Both of these recommendations are documented within

the EM260 Reference designs.

When developing application-specific manufacturing test procedures, Silicon Labs recommends the designer

refer to document AN700, Manufacturing Test Guidelines. This document provides more detail regarding

importance of designing the proper SIF interface as well as timing of the SIF.

EM260-RTR 数据表(PDF) 37 Page - Silicon image