GMS90C320PL40 datasheet(27/46 Pages) HYNIX

27 / 46 page

GMS90C320

OCT. 2000 Ver 1.2

Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOL of ALE and port 3. The

noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions

during bus operation. In the worst case (capacitive loading:

> 50pF at 3.3V, > 100pF at 5V), the noise pulse on ALE line may

exceed 0.8V. In such cases it may be desirable to qualify ALE with a schmitt-trigger, or use an address latch with a schmitt-

trigger strobe input.

Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the 0.9VCC specification

when the address lines are stabilizing.

ICC max at other frequencies is given by:

active mode: ICC =1.0 ×ƒOSC +3.16

idle mode: ICC =0.37 ×ƒOSC +3.63

where

OSC is the oscillator frequency in MHz. ICC values are given in mA and measured at VCC =5V.

ICC (active mode) is measured with:

XTAL1 driven with tCLCH,tCHCL =5ns,VIL =VSS +0.5V, VIH =VCC - 0.5V; XTAL2 = N.C.;

EA =Port0 = RESET =VCC; all other pins are disconnected. ICC would be slightly higher if a crystal oscillator is used (appr.

1mA).

ICC (Idle mode) is measured with all output pins disconnected and with all peripherals disabled;

XTAL1 driven with tCLCH,tCHCL =5ns,VIL =VSS +0.5V, VIH =VCC - 0.5V; XTAL2 = N.C.;

RESET=EA =VSS; Port0=VCC; all other pins are disconnected;

IPD (Power Down Mode) is measured under following conditions:

EA = Port 0=VCC; RESET = VSS; XTAL2 = N.C.; XTAL1 = VSS; all other pins are disconnected.

GMS90C320PL40 数据表(PDF) 27 Page - Hynix Semiconductor