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GMS90C320PL40 数据表(PDF) 38 Page - Hynix Semiconductor |
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GMS90C320PL40 数据表(HTML) 38 Page - Hynix Semiconductor |
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38 / 46 page ![]() GMS90C320 34 OCT. 2000 Ver 1.2 AC Characteristics for 50MHz version VCC =5V+10%, − 15%; VSS=0V; TA =0°Cto 70°C (CL for port 0. ALE and PSEN outputs = 100pF; CL for all other outputs = 80pF) Variable Clock : VCC=5V, 1/ tCLCL =3.5MHz to50MHz External Program Memory Characteristics Parameter Symbol 50 MHz Oscillator Variable Oscillator 1/tCLCL =3.5 to 50MHz Unit Min. Max. Min. Max. ALE pulse width tLHLL 25 - 2tCLCL−15 - ns Address setup to ALE tAVLL 5- tCLCL−15 - ns Address hold after ALE tLLAX 5- tCLCL−15 - ns ALE low to valid instruction in tLLIV -40 - 4tCLCL−40 ns ALE to PSEN tLLPL 5- tCLCL−15 - ns PSEN pulse width tPLPH 45 - 3tCLCL−15 - ns PSEN to valid instruction in tPLIV -20 - 3tCLCL−40 ns Input instruction hold after PSEN tPXIX 0- 0 - ns Input instruction float after PSEN tPXIZ1) 1) Interfacing the GMS90C320 to devices with float times up to 20 ns is permissible. This limited bus contention will not cause any damage to port 0 Drivers. -10 - tCLCL−10 ns Address valid after PSEN tPXAV1) 15 - tCLCL−5- ns Address to valid instruction in tAVIV -45 - 5tCLCL−55 ns Address float to PSEN tAZPL -5 - -5 - ns |
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