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GMS90C320PL40 数据表(PDF) 39 Page - Hynix Semiconductor

部件名 GMS90C320PL40
功能描述  HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS
PDF  46 Pages
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制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor

GMS90C320PL40 数据表(HTML) 39 Page - Hynix Semiconductor

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GMS90C320
OCT. 2000 Ver 1.2
35
AC Characteristics for 50MHz
External Data Memory Characteristics
Advance Information (50MHz)
External Clock Drive
Parameter
Symbol
at 50 MHz Clock
Variable Clock
1/tCLCL =3.5 to 50MHz
Unit
Min.
Max.
Min.
Max.
RD pulse width
tRLRH
90
-
6tCLCL-30
-
ns
WR pulse width
tWLWH
90
-
6tCLCL-30
-
ns
Address hold after ALE
tLLAX2
25
-
2tCLCL-15
-
ns
RD to valid data in
tRLDV
-60
-
5tCLCL-40
ns
Data hold after RD
tRHDX
0-
0
-
ns
Data float after RD
tRHDZ
-28
-
2tCLCL-12
ns
ALE to valid data in
tLLDV
-
120
-
8tCLCL-40
ns
Address to valid data in
tAVDV
-
125
-
9tCLCL-55
ns
ALE to WR or RD
tLLW L
45
75
3tCLCL-15
3tCLCL+15
ns
Address valid to WR or RD
tAVW L
50
-
4tCLCL-30
-
ns
WR or RD high to ALE high
tWHLH
535
tCLCL-15
tCLCL+15
ns
Data valid to WR transition
tQVW X
5-
tCLCL-15
-
ns
Data setup before WR
tQVW H
100
-
7tCLCL-40
-
ns
Data hold after WR
tWHQX
5-
tCLCL-15
-
ns
Address float after RD
tRLAZ
-0
-
0
ns
Parameter
Symbol
Variable Oscillator
(Freq. = 3.5 to 50MHz)
Unit
Min.
Max.
Oscillator period
tCLCL
20
285.7
ns
High time
tCHCX
10
tCLCL -tCLCX
ns
Low time
tCLCX
10
tCLCL -tCHCX
ns
Rise time
tCLCH
-10
ns
Fall time
tCHCL
-10
ns



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