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GMS90C320PL40 数据表(PDF) 30 Page - Hynix Semiconductor

部件名 GMS90C320PL40
功能描述  HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS
PDF  46 Pages
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制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor

GMS90C320PL40 数据表(HTML) 30 Page - Hynix Semiconductor

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GMS90C320
26
OCT. 2000 Ver 1.2
AC Characteristics for 12MHz version
External Program Memory Characteristics
VCC=5V:
VCC=5V + 10%, −15%; VSS=0V; TA=0°Cto 70°C
(CL for port 0. ALE and PSEN outputs = 100pF; CL for all other outputs = 80pF)
VCC=3.3V:
VCC=3.3V + 0.3V, −0.6V; VSS=0V; TA=0°Cto 70°C
(CL for port0.ALE and PSEN outputs = 50pF; CL for all other outputs = 50pF)
Variable clock:
Vcc = 5V: 1/tCLCL =3.5 MHz to12MHz
Vcc = 3.3V: 1/tCLCL =1 MHz to 12 MHz
Parameter
Symbol
12 MHz Oscillator
Variable Oscillator
1/tCLCL = 3.5 to 12MHz
Unit
Min.
Max.
Min.
Max.
ALE pulse width
tLHLL
127
-
2tCLCL-40
-
ns
Address setup to ALE
tAVLL
43
-
tCLCL-40
-
ns
Address hold after ALE
tLLAX
43
-
tCLCL-40
-
ns
ALE low to valid instruction in
tLLIV
-233
-
4tCLCL-100
ns
ALE to PSEN
tLLPL
58
-
tCLCL-25
-
ns
PSEN pulse width
tPLPH
215
-
3tCLCL-35
-
ns
PSEN to valid instruction in
tPLIV
-150
-
3tCLCL-100
ns
Input instruction hold after PSEN
tPXIX
0-
0
-
ns
Input instruction float after PSEN
tPXIZ1)
1)
Interfacing the GMS90C320 to devices with float times up to 75 ns is permissible. This limited bus contention will not cause any damage
to port 0 Drivers.
-63
-
tCLCL-20
ns
Address valid after PSEN
tPXAV1)
75
-
tCLCL-8
-
ns
Address to valid instruction in
tAVIV
-302
-
5tCLCL-115
ns
Address float to PSEN
tAZPL
-10
-
-10
-
ns



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