ICS82C404 datasheet(6/13 Pages) ICST

6 / 13 page

The serial data register is exactly 24 bits long, enough to accept

the data being sent. The stop bit acts a load command that

passes the contents of the Serial Data Register into the register

indicated by the three address bits. If a stop bit is not received

after the serial register is full, and more data is sent, all data in

the register is ignored and an error issued. If correct data is

received, then the unlocking mechanism rearms, all data in the

serial data register is ignored, and an error is issued.

Programming the ICS82C404

The ICS82C404 has a wide operating range, but it is recom-

mended that it is operated within the following limits:

1 MHz < FREF < 60 MHz

FREF=Input

Reference Frequency

200 kHz < FREF/M < 5 MHz

M=Reference divide

3 to 129

50 MHz < FVCO < 120 MHz

FVCO=VCO output

frequency

FCLK < 120 MHz

FCLK=output

frequency

The frequency of the programmable oscillator FVCO is deter-

mined by the following fields:

Field

# of Bits

Index (I)

N counter value (N’)

Mux (R)

M counter value (M’)

Where the least significant bit is the last bit of M and the most

significant bit is the first bit of 1.

The equations used to determine the oscillator frequency are:

N=N’ + 3 M=M’+2

FVCO=Prescale • N/M • FCLK

where < M < 129 and 4 < N < 130

and prescale=2 or 4, as set in the control register

The value of FVCO must remain between 50 MHz and

120 MHz. As a result, for output frequencies below 50 MHz,

FVCO must be brought into range. To achieve this, an output

divisor is selected by setting the values of the Mux Field (R)

as follows:

Output Divisor

Divisor

000

001

010

011

100

101

110

111

128

Unlike the ICD’s 82C404, the ICS82C404’s VCO does not

require tuning to place it in certain ranges. The ICS82C404’s

VCO will operate from 50 MHz to 120 MHz without adjusting

the VCO gain. However, to maintain compatibility, the I bits

are programmed as in the ICD2061A.

These bits are dummy bits except for the following two cases:

Index Field (I)

VCLK FVCO

MCLK FVCO

1110

1111

Turn off VCLK

Mux MCLK to VLCK

50-120 MHz

When the index field is set to 1111, VCLK is turned off and

both channels run from the same MCLK VCO. This is done in

an effort to reduce jitter, which may increase when VCOs run

at 2

n multiples of one another. If the two outputs must be

multiples of one another, it is best to mux MCLK over to the

output of the VCLK VCO, and to power-down the VCLK

VCO. The multiplexed frequency will be divided down by the

correct divisor (M) and output on VCLK.

ICS82C404

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