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AN3112 数据表(PDF) 7 Page - STMicroelectronics |
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AN3112 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 36 page ![]() AN3112 Implementing the line-modulated fixed-off-time Doc ID 16820 Rev 3 7/36 Equation 3 and V''ZCD(t) decreases from Vmult+VBE to VZCDtrigger = 0.7 V (trigger level) in the following time period t'': Equation 4 Figure 7 illustrates the signal on the ZCD pin with the two discharging time constants depending on the two resistors R, R0 and the L6564 parameters, particularly the upper clamp voltage and the triggering voltage of the ZCD pin. Figure 7. ZCD pin signal with the fixed off-time generator circuit The sum of the two time periods is the off-time function: Equation 5 In this way, once the multiplier operating point (that is, the Vmult /VAC ratio) is fixed, with the proper selection of R and R0, it is possible to increase TOFF with the line voltage so that, at maximum line voltage, it is always TON>TONmin, where TONmin is the minimum on-time of the L6564 gate drive [ 4]. This is a required condition in order to avoid line distortion [5]. () () ⎥⎥⎦ ⎤ ⎢ ⎢ ⎣ ⎡ ⋅ + − + ⋅ ⋅ + ⋅ ⋅ + ⋅ − = ′ R V V ) R R ( V R V V ln C R R R R t BE mult 0 ZCDclamp 0 BE mult 0 0 ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ + ⋅ − = ′′ BE mult ZCDtrigger V V V ln RC t () () () ⎥ ⎥ ⎦ ⎤ ⎢ ⎢ ⎣ ⎡ ⎟⎟⎠ ⎞ ⎜⎜⎝ ⎛ + + ⎥ ⎥ ⎦ ⎤ ⎢ ⎢ ⎣ ⎡ ⋅ + − + ⋅ ⋅ + ⋅ + ⋅ − = BE mult ZCDtrigger BE mult 0 ZCDclamp 0 BE mult 0 0 OFF V V V ln R V V ) R R ( V R V V ln R R R RC T |
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