Designing a fixed-off-time PFC

AN3112

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Doc ID 16820 Rev 3

Equation 48

The voltage on the MULT pin is also used to derive the information from the RMS mains

voltage for the VFF compensation.

Before describing the correct operating point of the multiplier for the brownout function the

voltage feed forward pin and its enable-disable property is here described:

Pin 5 (voltage feed forward): The power stage gain of PFC pre-regulators varies with the

square of the RMS input voltage. As does the crossover frequency (fc) of the overall open-

loop gain because the gain has a single pole characteristic. This leads to large trade-offs in

the design. For example, setting the gain of the error amplifier to get fc = 20 Hz @ 264 Vac

means having fc about 4 Hz @ 88 Vac, resulting in sluggish control dynamics. Additionally,

the slow control loop causes large transient current flow during rapid line or load changes

that are limited by the dynamics of the multiplier output. This limit is considered when

selecting the sense resistor to let the full load power pass under minimum line voltage

conditions, with some margin. But a fixed current limit allows excessive power input at high

line, whereas a fixed power limit requires the current limit to vary inversely with the line

voltage.

Voltage feed-forward can compensate for the gain variation with the line voltage and allow

the overcoming of all of the above-mentioned issues. It consists of deriving a voltage

corrector) and providing the resulting signal to the multiplier which generates the current

reference for the inner current control loop.

In this way, a change of the line voltage causes an inversely proportional change of the half-

sine amplitude at the output of the multiplier (if the line voltage doubles the amplitude of the

multiplier, output is halved and vice versa), so that the current reference is adapted to the

new operating conditions with (ideally) no need for invoking the slow dynamics of the error

amplifier. Additionally, the loop gain is constant throughout the input voltage range, which

significantly improves the dynamic behavior at low line and simplifies loop design.

Actually, with another PFC embedding the voltage feed-forward, deriving a voltage

proportional to the RMS line voltage implies a form of integration, which has its own time

constant. If it is too small the voltage generated may be affected by a considerable amount

of ripple at twice the mains frequency which causes distortion to the current reference

(resulting in high THD and poor PF); if it is too large there may be a considerable delay in

setting the right amount of feed-forward, resulting in excessive overshoot and undershoot of

the pre-regulator's output voltage in response to large line voltage changes. Clearly a trade-

off was required.

The L6564 produces an innovative voltage feed-forward which, with a technique that makes

use of just two external parts, overcomes this time constant trade-off issue regardless of

which voltage change occurs on the mains, both surges and drops. A capacitor CFF and a

resistor RFF, both connected from the VFF pin (pin #5) to ground, complete an internal

peak-holding circuit that provides a DC voltage equal to the peak of the rectified sine-wave

applied on the MULT pin (pin #3). In this case the following value has been selected:

(15)

V

V

66

.

1

dV

dV

MULT

CS

=

F

1

C

FF

µ

=

Ω

= M

1

R

FF