SRK2000 main characteristics

AN3303

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Doc ID 18164 Rev 2

capacitance, but it may be necessary to add an external capacitance; in particular when

using power MOSFET packages with a high associated stray inductance, such as the TO-

220.

In several cases it can be advantageous to over-compensate with the external capacitor,

therefore introducing an additional delay to the power MOSFET turn-off. This solution,

shown on the right-hand side of Figure 5, reduces the current flowing through the power

MOSFET body diode increasing the efficiency. Power MOSFET turn-off fine tuning must be

handled carefully because, if the power MOSFET is turned off after the drain-source voltage

becomes positive, the current reverses and begins flowing from drain-to-source with

consequent converter malfunctioning.

Figure 5.

Effect of parasitic elements on power MOSFET turn-off

A second effect associated to the parasitic elements is related to the power MOSFET turn-

on. Before turn-on, at the half-bridge inversion, the corresponding drain voltage starts

decreasing; the DVS voltage also drops but the RC formed by the parasitic capacitance of

pin DVS (about 10 pF) and the sensing resistors introduces a time constant that slows down

the sensed signal. During this phase the power MOSFET stray inductance does not

contribute because there is no current flowing through it. As illustrated in Figure 6, this

results in a late power MOSFET turn-on which adversely affects efficiency.

This turn-on delay, which is negligible if the sensing resistor value is indicatively below 1 k

Ω,

becomes significant in a case where the resistor value is high and, obviously, further

increases if an external capacitor is mounted between the pin and ground as previously

indicated. To avoid this effect, a bypass diode can be mounted in parallel to the sensing

resistor. In this way, the parasitic capacitance is discharged through the diode dynamic

resistance instead of the sense resistor. A 100-200

Ω resistor in series to the bypass diode

is recommended to limit the current sourced from the DVS pins in case SR power MOSFET

drain voltage goes excessively below ground.