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AN3303 数据表(PDF) 14 Page - STMicroelectronics |
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AN3303 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 27 page ![]() Sensing optimization by waveform check AN3303 14/27 Doc ID 18164 Rev 2 3 Sensing optimization by waveform check The board has been tested on a 150 W 12 V LLC converter (see Reference 2). The following assertions refer to EVLSRK2000-L-40 but similar considerations can be made for all the configurations of EVLSRK2000-x-xx. Note that current and voltage probes can affect the IC sensing leading to malfunctioning. Signal probing must be accomplished carefully and with minimal modification with respect to the original circuit. Figure 13 and 14 show key signals of the SRK2000: each SR power MOSFET is switched on and off according to its drain-source voltage which, during conduction time, is the voltage image of the current flowing through the power MOSFET. The measurement resolution is not sufficient to appreciate the turn-off threshold voltage on power MOSFET drain but the voltage step changes, corresponding to the power MOSFET turn-on and turn-off, can be noted. 3.1 Power MOSFET turn-off compensation Considering the SR power MOSFET RDS(on) and the SRK2000 turn-off threshold, turn-off current can be approximately calculated as follows: Equation 3 Actually, this calculation neglects many other factors like the IC driver propagation delay and the RDS(on) deviation due to operative temperature. Furthermore, as previously discussed, turn-off timing is heavily influenced by parasitic elements. Because it is quite difficult to accurately estimate all these parameters, it is better to confront this issue from a practical point of view. As seen in Figure 14, the power MOSFET turns off when significant current is still flowing through it, which is diverted to the MOSFET body diode. It can be worth delaying the turn-off to increase efficiency. This can be easily Figure 13. Full load operation Figure 14. Full load operation - detail CH1: SR FET drain CH3: SR FET current CH2: SR FET gate CH4: primary current CH1: SR FET drain CH3: SR FET current CH2: SR FET gate CH4: primary current I OFF V DVS1 2OFF , R DS on () -------------------------------- = _ |
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