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PM0044 数据表(PDF) 123 Page - STMicroelectronics |
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PM0044 数据表(HTML) 123 Page - STMicroelectronics |
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123 / 162 page ![]() PM0044 STM8 instruction set Doc ID 13590 Rev 3 123/162 Syntax NEGW dst e.g. NEGW X Operation dst <= (dst XOR FFFF) + 1, or 0000 - dst Description The destination word is read, then each bit is toggled (inverted), and the result is incremented before it is written at the destination word. The destination is an index register. Instruction overview . V ⇒ R15.R14.R13.R12.R11.R10.R9.R8.R7.R6.R5.R4.R3.R2.R1.R0 Set if there is an arithmetic overflow on the 16-bit representation. The V bit will set when the content of "dst" was $8000 prior to the NEGW operation, cleared otherwise. N ⇒ R15 Set if bit 7 of the result is set (negative value), cleared otherwise. Z ⇒ R15.R14.R13.R12.R11.R10.R9.R8.R7.R6.R5.R4.R3.R2.R1.R0 Set if the result is zero (0x00), cleared otherwise. C ⇒ R15+R14+R13+R12+R11+R10+R9+R8+R7+R6+R5+R4+R3+R2+R1+R0 Set if a borrow in the implied subtraction from zero, cleared otherwise. The C bit will be set in all cases except when the contents of "dst" was $0000 prior to the NEGW operation. Detailed description See also: NEG, CPLW, AND, OR, XOR NEGW Negate word (Logical 2’s Complement) NEGW mnem dst Affected condition flags VI1 H I0 N Z C NEGW X V - - - N Z C NEGW Y V - - - N Z C dst Asm cy lgth Op-code(s) ST7 XNEGW X 2 1 50 YNEGW Y 2 2 90 50 |
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