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PM0044

Pipelined execution

Doc ID 13590 Rev 3

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5.3

Pipelined execution examples

A few pipelined execution examples are reported below. The numbers of cycles for the

decoding and execution stages correspond to the minimum number of cycles needed by the

instruction itself. In some cases, depending on the instruction sequence, the cycle taken

could be more than that number.

5.4

Conventions

Although the decode and/or execute stage of some instructions may take a different number

of cycles, a simplified convention providing a good match with reality, has been used in this

section:

●

The decode stage of each instruction takes one cycle only

●

The execution stage takes a number of cycles equal to

Where

Cy is the number of execution cycles. In case of decode and execute cycles, It

corresponds to the minimum number of cycles needed by the instruction itself, and

does not take into account the impact of the instruction sequence.

DecCy is the exact number of decode cycles.

ExeCy is the exact number of execute cycles.

The decode stage of the next instruction starts during the last execution cycle. In

instructions performing pipeline flush, the convention is that, in case the branch is taken, the

next fetch are performed during the last instruction execution cycle.

The exact number of cycles (see Table 3) and the number of cycles obtained using this

convention (see Table 4) are identical.

DecCy

ExeCy

–

Table 3.

Example with exact number of cycles

Address

Instruction

Decode

cycles

Execute

cycles

lgth

Time (cycle)

11 12 13 14

0xC000

LDW X, [$50.w]

0xC003

ADDW X, #20

0xC006

LD A, [$30].w

0xC009

….

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