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PM0044 数据表(PDF) 161 Page - STMicroelectronics |
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PM0044 数据表(HTML) 161 Page - STMicroelectronics |
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161 / 162 page ![]() PM0044 Revision history Doc ID 13590 Rev 3 161/162 8 Revision history Table 43. Document revision history Date Revision Changes 14-Jan-2008 1 Initial release. 05-Jun-2008 2 Modified Figure 2: Context save/restore for interrupts on page 14 2 0-Sep-2011 3 Changed notation for hexadecimal numbers from XXh to 0xXX. Removed CPU register context saving from Section 3.2: CPU registers. Added LDF in Table 22: Available Extended Direct addressing mode instructions. Updated Figure 2: Context save/restore for interrupts. Added BREAK instruction in Table 41: Instruction groups. Added Section 5: Pipelined execution. Table 42: Instruction set summary: updated ADDW, BCCM, BRES, BSET, BTJF, BTJT, CALLR, DEC, DECW, DIV, EXGW, JRA, JRC, JREQ, JRH, JRIH, JRIL, JRM, JRMI, JRNC, JRNE, JRNH, JRNM, JRNV, JRPL, JRSGE, JRSGT, JRSLE, JRSLT, JRUGE, JRULT, LDF, LDW, MOV, NEG, PUSH, RRCW, SBC, SLA, SLAW, SLL, SLLW, SRA, SRAW, SRL, SRLW, SUB. Added BREAK and INT instructions. Section 7: STM8 instruction set: updated ADD, ADDW, BCCM, BCP, BCPL, BRES, BSET, BTJF, BTJT, CLR, CP, CPW, DEC, DECW, HALT, INCW, INT, JP, JRxx, MOV, RLWA, RRCW, RRWA, SBC, SRLW, SUB, and SWAPW. Added BREAK instruction. Merged JRA with JRL instructions, SLA with SLL, and SLAW with SLLW. |
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