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AN4471 数据表(PDF) 5 Page - STMicroelectronics |
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AN4471 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 39 page ![]() DocID026197 Rev 1 5/39 AN4471 Hardware layout and configuration 39 3 Hardware layout and configuration The STEVAL-IME009V1 evaluation board is designed around the STHV800. The hardware block diagram (Figure 2) illustrates the main connection between STHV800, the FPGA, the STM32F103C8T6 and the SPI Flash memory. Figure 3 will help you to locate connectors, LEDs and features on the board. Figure 2. Hardware block diagram Figure 3. STEVAL-IME009V1 board layout |
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