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LT1336CS 数据表(PDF) 3 Page - Linear Technology |
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LT1336CS 数据表(HTML) 3 Page - Linear Technology |
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3 / 16 page  3 LT1336 VIS ISENSE Peak Current Threshold VTSOURCE = 60V, VBOOST = 68V, V + – VISENSE 310 480 650 mV VISHYS ISENSE Hysteresis VTSOURCE = 60V, VBOOST = 68V 25 55 85 mV VSAT Switch Saturation Voltage VISENSE = V +, VBOOST – VTSOURCE = 9V, q 0.85 1.2 V ISW = 100mA VBOUT VBOOST Regulated Output VTSOURCE = 40V, VINTOP = VINBOTTOM = 0.8V, 10 10.6 11.2 V IBOOST = 10mA, VBOOST – VTSOURCE tr Top Gate Rise Time VINTOP (+) Transition, VINBOTTOM = 0.8V, q 130 200 ns Measured at VTGATE DR – VTSOURCE (Note 4) Bottom Gate Rise Time VINBOTTOM (+) Transition, VINTOP = 0.8V, q 90 200 ns Measured at VBGATE DR (Note 4) tf Top Gate Fall Time VINTOP (–) Transition, VINBOTTOM = 0.8V, q 60 140 ns Measured at VTGATE DR – VTSOURCE (Note 4) Bottom Gate Fall Time VINBOTTOM (–) Transition, VINTOP = 0.8V, q 60 140 ns Measured at VBGATE DR (Note 4) tD1 Top Gate Turn-On Delay VINTOP (+) Transition, VINBOTTOM = 0.8V, q 250 500 ns Measured at VTGATE DR – VTSOURCE (Note 4) Bottom Gate Turn-On Delay VINBOTTOM (+) Transition, VINTOP = 0.8V, q 200 400 ns Measured at VBGATE DR (Note 4) tD2 Top Gate Turn-Off Delay VINTOP (–) Transition, VINBOTTOM = 0.8V, q 300 600 ns Measured at VTGATE DR – VTSOURCE (Note 4) Bottom Gate Turn-Off Delay VINBOTTOM (–) Transition, VINTOP = 0.8V, q 200 400 ns Measured at VBGATE DR (Note 4) tD3 Top Gate Lockout Delay VINBOTTOM (+) Transition, VINTOP = 2V, q 300 600 ns Measured at VTGATE DR – VTSOURCE (Note 4) Bottom Gate Lockout Delay VINTOP (+) Transition, VINBOTTOM = 2V, q 250 500 ns Measured at VBGATE DR (Note 4) tD4 Top Gate Release Delay VINBOTTOM (–) Transition, VINTOP = 2V, q 250 500 ns Measured at VTGATE DR – VTSOURCE (Note 4) Bottom Gate Release Delay VINTOP (–) Transition, VINBOTTOM = 2V, q 200 400 ns Measured at VBGATE DR (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ELECTRICAL CHARACTERISTICS Test Circuit, T A = 25°C, V + = VBOOST = 12V, VTSOURCE = 0V, and Pins 1, 16 open. Gate Feedback pins connected to Gate Drive pins unless otherwise specified. The q denotes specifications which apply over the full operating temperature range. Note 1: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: LT1336CN/LT1336IN: TJ = TA + (PD)(70°C/W) LT1336CS/LT1336IS: TJ = TA + (PD)(110°C/ W) Note 2: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Typical Performance Characteristics and Applications Information sections. Note 3: Pins 1 and 16 connected to each end of the inductor. Booster is free running. Note 4: See Timing Diagram. Gate rise times are measured from 2V to 10V and fall times are measured from 10V to 2V. Delay times are measured from the input transition to when the gate voltage has risen to 2V or decreased to 10V. |
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