LT1336CS datasheet(6/16 Pages) LINER

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LT1336

TYPICAL PERFORMANCE CHARACTERISTICS

PIN FUNCTIONS

ISENSE (Pin 1): Boost Regulator ISENSE Comparator Input.

An RSENSE placed between Pin 1 and V + sets the maximum

peak current. Pin 1 can be left open if the boost regulator

is not used.

SV+(Pin 2): Main Signal Supply. Must be closely decoupled

to the signal ground Pin 6.

INTOP (Pin 3): Top Driver Input. Pin 3 is disabled when Pin

4 is high. A 3k input resistor followed by a 5V internal

clamp prevents saturation of the input transistors.

INBOTTOM (Pin 4): Bottom Driver Input. Pin 4 is disabled

when Pin 3 is high. A 3k input resistor followed by a 5V

internal clamp prevents saturation of the input transistors.

UVOUT (Pin 5): Undervoltage Output. Open collector NPN

output which turns on when V + drops below the undervolt-

age threshold.

SGND (Pin 6): Small-Signal Ground. Must be routed

separately from other grounds to the system ground.

PGND (Pin 7): Bottom Driver Power Ground. Connects to

source of bottom N-channel MOSFET.

BGATEFB (Pin 8): Bottom Gate Feedback. Must connect

directly to the bottom power MOSFET gate. The top

MOSFET turn-on is inhibited until Pin 8 has discharged to

below 2.5V.

BGATEDR (Pin 9): Bottom Gate Drive. The high current

drive point for the bottom MOSFET. When a gate resistor

is used it is inserted between Pin 9 and the gate of the

MOSFET.

PV+ (Pin 10): Bottom Driver Supply. Must be connected

to the same supply as Pin 2.

TSOURCE (Pin 11): Top Driver Return. Connects to the top

MOSFET source and the low side of the bootstrap capacitor.

TGATEFB (Pin 12): Top Gate Feedback. Must connect

directly to the top power MOSFET gate. The bottom

MOSFET turn-on is inhibited until VTGATE FB – VTSOURCE

has discharged to below 2.9V.

TGATEDR (Pin 13): Top Gate Drive. The high current drive

point for the top MOSFET. When a gate resistor is used it

is inserted between Pin 13 and the gate of the MOSFET.

BOOST (Pin 14): Top Driver Supply. Connects to the high

side of the bootstrap capacitor.

SWGND (Pin 15): Boost Regulator Ground. Must be routed

separately from the other grounds to the system ground.

Pin 15 can be left open if the boost regulator is not used.

SWITCH (Pin 16): Boost Regulator Switch. Connect this

pin to the inductor/diode of the boost regulator network.

Pin 16 can be left open if the boost regulator is not used.

VBOOST Regulated Output

vs Temperature

ISENSE Voltage Threshold

vs Temperature

TEMPERATURE (

°C)

–50

100

1336 G20

050

0.52

0.50

0.48

0.46

0.44

0.42

0.40

0.38

0.36

–25

125

HIGH VOLTAGE THRESHOLD

LOW VOLTAGE THRESHOLD

V+ = 12V

VBOOST = 68V

VTSOURCE = 60V

TEMPERATURE (

°C)

–50

100

1336 G19

050

12.0

11.5

11.0

10.5

10.0

9.5

9.0

8.5

8.0

–25

125

VBOOST – VTSOURCE

V+ = 12V

VTSOURCE = 40V

ILOAD = 10mA

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