UPD75316BGC datasheet(2/77 Pages) NEC

2 / 77 page

µPD75312B, 75316B

Function

0.95

µs, 1.91 µs, 15.3 µs (main system clock: @ 4.19 MHz)

122

µs (subsystem clock: @ 32.768 kHz)

16256

× 8 bits (

µPD75316B), 12160 × 8 bits (µPD75312B)

1024

× 4 bits

• 4-bit access: 8 (B, C, D, E, H, L, X, A)

• 8-bit access: 4 (BC, DE, HL, XA)

• Bit accumulator (CY)

• 4-bit accumulator (A)

• 8-bit accumulator (XA)

• Various bit manipulation instructions

• Efficient 4-bit data manipulation instructions

• 8-bit data transfer instructions

• GETI instruction that can implement 2-byte/3-byte instructions with 1 byte

• Number of segments selection: 24/28/32 segments (4/8 can be switched at bit

port output.)

• Display mode selection: Static, 1/2 duty, 1/3 duty (1/2 bias), 1/3 duty (1/3 bias),

1/4 duty

• LCD drive split resistor can be incorporated by mask option

VDD = 2.0 to 6.0 V

• 8-bit timer/event counter

• Clock source: 4 stages

• Event count possible

• 8-bit basic interval timer

• Standard clock generation: 1.95 ms, 7.82 ms, 31.3 ms, 250 ms

(@ 4.19 MHz)

• Watchdog timer application possible

FUNCTION OUTLINE (1/2)

ROM

RAM

Item

Number of basic instructions

Instruction cycle

On-chip memory

General register

Accumulators

Instruction set

I/O lines

LCD controller/driver

Supply voltage range

Timer

CMOS input

with software-specifiable pull-up resistors : 23

CMOS input/output

CMOS output

Used with segment pins

10-V withstand voltage, with mask option pull-

up resistors: 8

N-ch open-drain

input/output

3 channels

UPD75316BGC 数据表(PDF) 2 Page - NEC

UPD75316BGC 数据表(HTML) 2 Page - NEC

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