LTC1098AC datasheet(21/28 Pages) LINER

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LTC1096/LTC1096L

LTC1098/LTC1098L

APPLICATI

I FOR ATIO

reference voltage for a typical value of VOS. For example,

a VOS of 2mV which is 0.1LSB with a 5V reference becomes

0.5LSB with a 1V reference and 2.5LSBs with a 0.2V

reference. If this offset is unacceptable, it can be corrected

digitally by the receiving system or by offsetting the “–”

input of the LTC1096.

Noise with Reduced VREF

The total input referred noise of the LTC1096 can be

reduced to approximately 1mV peak-to-peak using a ground

plane, good bypassing, good layout techniques and mini-

mizing noise on the reference inputs. This noise is insig-

nificant with a 5V reference but will become a larger

fraction of an LSB as the size of the LSB is reduced.

For operation with a 5V reference, the 1mV noise is only

0.05LSB peak-to-peak. In this case, the LTC1096 noise

will contribute virtually no uncertainty to the output

code. However, for reduced references, the noise may

become a significant fraction of an LSB and cause

undesirable jitter in the output code. For example, with a

1V reference, this same 1mV noise is 0.25LSB peak-to-

peak. This will reduce the range of input voltages over

which a stable output code can be achieved by 1LSB. If

the reference is further reduced to 200mV, the 1mV

noise becomes equal to 1.25LSBs and a stable code may

be difficult to achieve. In this case averaging readings

may be necessary.

This noise data was taken in a very clean setup. Any setup-

induced noise (noise or ripple on VCC, VREF or VIN) will add

to the internal noise. The lower the reference voltage to be

used, the more critical it becomes to have a clean, noise free

setup.

Conversion Speed with Reduced VREF

With reduced reference voltages the LSB step size is

reduced and the LTC1096 internal comparator over-

drive is reduced. Therefore, it may be necessary to

reduce the maximum CLK frequency when low values

of VREF are used.

Input Divider

It is OK to use an input divider on the reference input of the

LTC1096 as long as the reference input can be made to

settle within the bit time at which the clock is running.

When using a larger value resistor divider on the reference

input the “–” input should be matched with an equivalent

resistance.

Bypassing Reference Input with Divider

Bypassing the reference input with a divider is also pos-

sible. However, care must be taken to make sure that the

DC voltage on the reference input will not drop too much

below the intended reference voltage.

AC PERFORMANCE

Two commonly used figures of merit for specifying the

dynamic performance of the ADCs in digital signal pro-

cessing applications are the signal-to-noise ratio (SNR)

and the effective number of bits (ENOBs).

Signal-to-Noise Ratio

The signal-to-noise ratio (SNR) is the ratio between the

RMS amplitude of the fundamental input frequency to

the RMS amplitude of all other frequency components at

the A/D output. This includes distortion as well as noise

products and for this reason it is sometimes referred to

as signal-to-noise + distortion [S/(N + D)]. The output is

band limited to frequencies from DC to one half the

sampling frequency. Figure 11 shows spectral content

from DC to 15.625kHz which is 1/2 the 31.25kHz sam-

pling rate.

FREQUENCY (kHz)

–60

–30

–20

LTC1096/8 • F11

–70

–80

–120

–100

–10

–40

–50

–90

–110

fSAMPLE = 31.25kHz

fIN = 11.8kHz

Figure 11. This Clean FFT of an 11.8kHz Input Shows

Remarkable Performance for an ADC That Draws Only 100

µA

When Sampling at the 31.25kHz Rate

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