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LTC3853 数据表(PDF) 8 Page - Linear Technology

部件名 LTC3853
功能描述  Triple Output, Multiphase Synchronous Step-Down Controller
PDF  36 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC3853 数据表(HTML) 8 Page - Linear Technology

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LTC3853
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For more information www.linear.com/LTC3853
PIN FUNCTIONS
SENSE1+,SENSE2+,SENSE3+(Pins3,5,7):CurrentSense
ComparatorInputs.The(+)inputstothecurrentcompara-
tors are normally connected to DCR sensing networks or
current sensing resistors. SENSE3+ common modes up
to 13.5V, allowing higher VOUT voltages on channel 3.
SENSE1, SENSE2, SENSE3(Pins 4, 6, 8): Current
Sense Comparator Inputs. The (–) inputs to the current
comparatorsareconnectedtotheoutputs.SENSE3com-
mon modes up to 13.5V, allowing higher VOUT voltages
on channel 3.
VFB1,VFB2,VFB3(Pins9,12,14):ErrorAmplifierFeedback
Inputs. These pins receive the remotely sensed feedback
voltages for each channel from external resistive dividers
across the outputs. Connecting VFB2toVINthrougha200k
resistor enables dual output (2 + 1) mode.
ITH1, ITH2, ITH3 (Pins 10, 13, 15): Current Control Thresh-
olds and Error Amplifier Compensation Points. Each as-
sociated channels’ current comparator tripping threshold
increases with its ITH control voltage. In dual output
(2 + 1) mode, ITH1 and ITH2 need to be shorted externally.
SGND (Pin 11): Signal Ground. All small-signal compo-
nents and compensation components should connect to
this ground, which in turn connects to PGND at one point.
PGOOD3 (Pin 16):Power Good Indicator Output for Phase
3. Open-drain logic out that is pulled to ground when any
channel output exceeds the ±7.5% regulation window,
after the internal 17µs power bad mask timer expires.
PGOOD12 (Pin 17): Power Good Indicator Output for
Phases 1 and 2. Open-drain logic out that is pulled to
ground when any channel output exceeds the ±7.5%
regulation window, after the internal 17µs power bad
mask timer expires.
INTVCC (Pin 22): Internal 5V Regulator Output. The
control circuits are powered from this voltage. Also
provides channel 3 driver power. Decouple this pin to
PGND with a minimum of 4.7µF low ESR tantalum or
ceramic capacitor.
EXTVCC(Pin23):ExternalPowerInputtoanInternalSwitch
Connected to INTVCC. This switch closes and supplies the
IC power, bypassing the internal low dropout regulator,
whenever EXTVCC is higher than 4.7V. Do not exceed 6V
on this pin and ensure VIN > VEXTVCC at all times.
VIN (Pin 24): Main Input Supply. Decouple this pin to
PGND with a capacitor (0.1µF to 1µF).
DRVCC12(Pin29):DriverVoltageInputforChannels 1and
2. Do not exceed 6V on this pin. This pin must be tied to
INTVCC externally.
BG1, BG2, BG3 (Pins 30, 28, 21): Bottom Gate Driver
Outputs. These pins drive the gates of the bottom N-
channel MOSFETs between PGND and INTVCC/DRVCC12.
SW1, SW2, SW3 (Pins 31, 27, 20): Switch Node Con-
nections to Inductors. Voltage swing at these pins is
from a Schottky diode (external) voltage drop below
ground to VIN.
TG1,TG2,TG3(Pins32,26,19):TopGateDriverOutputs.
These are the outputs of floating drivers with a voltage
swing equal to INTVCC superimposed on the switch nodes
voltages.
BOOST1, BOOST2, BOOST3 (Pins 33, 25, 18): Boosted
Floating Driver Supplies. The (+) terminal of the boot-
strap capacitors connect to these pins. These pins swing
from a diode voltage drop below INTVCC up to VIN +
INTVCC.



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