LTC1852/LTC1853

1

18523fa

BLOCK DIAGRAM

FEATURES

APPLICATIONS

DESCRIPTION

8-Channel, 10-Bit/12-Bit,

400ksps, Low Power, Sampling ADCs

8-channel data acquisition systems. They include a flexible

8-channel multiplexer, a 400ksps successive approxima-

tion analog-to-digital converter, an internal reference and a

parallel output interface. The multiplexer can be configured

for single-ended or differential inputs, two gain ranges and

unipolar or bipolar operation. The ADCs have a scan mode

that will repeatedly cycle through all 8 multiplexer channels

and can also be programmed to sequence through up to

16 addresses and configurations. The sequence can also

be read back from internal memory.

The reference and buffer amplifier provide pin strappable

ranges of 4.096V, 2.5V and 2.048V. The parallel output

includes the 10-bit or 12-bit conversion result plus the

4-bit multiplexer address. The digital outputs are pow-

ered from a separate supply allowing for easy interface

to 3V digital logic. Typical power consumption is 10mW

at 400ksps from a single 5V supply and 3mW at 250ksps

from a single 3V supply.

Single-Ended or Differential Inputs

Two Gain Ranges

Unipolar or Bipolar Operation

Eliminate Configuration Software Overhead

and 12-Bit LTC1851

BUSY

D11/S2

D10/S1

D9/S0

D8

D7

D6

D5

D4

D3

D2

D1

D0

M1

SHDN

CS

CONVST

RD

WR

DIFF

A2

A1

A0

UNI/BIP

PGA

M0

OUTPUT

DRIVERS

DATA

LATCHES

OGND

18523 BD

REF AMP

REFCOMP

REFIN

REFOUT

COM

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

8-CHANNEL

MULTIPLEXER

2.5V

REFERENCE

INTERNAL

CLOCK

LTC1853

CONTROL LOGIC

AND

PROGRAMMABLE

SEQUENCER

12-BIT

SAMPLING

ADC

+

–

Integral Linearity

0

512 1024 1536 2048 2560 3072 3584 4096

CODE

1.0

0.5

0

–0.5

–1.0

1852 F01

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.