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LTC1852/LTC1853

18523fa

INPUT VOLTAGE (V)

FS – 1LBS

1111...1111

1111...1110

1111...1101

1000...0001

1000...0000

0111...1111

0111...1110

0000...0010

0000...0001

0000...0000

18523 F01A

FS = VREFCOMP

INPUT VOLTAGE (V)

–FS

–1LBS 0 1LBS

FS – 1LBS

0111...1111

0111...1110

0111...1101

0000...0001

0000...0000

1111...1111

1111...1110

1000...0010

1000...0001

1000...0000

18523 F01B

BIPOLAR

ZERO

FS =

VREFCOMP

SINGLE-ENDED/

DIFFERENTIAL BIT

UNIPOLAR/

BIPOLAR BIT

END OF

SEQUENCE BIT

PGA BIT

18523 F01

MUX ADDRESS

adjusted until the output code ﬂickers between 1111 1111

1110 and 1111 1111 1111 for the LTC1853 and between

11 1111 1110 and 11 1111 1111 for the LTC1852.

For bipolar inputs, an input voltage of FS – 1.5LSBs should

be applied to the “+” input and the appropriate reference

adjusted until the output code ﬂickers between 0111 1111

1110 and 0111 1111 1111 for the LTC1853 and between

01 1111 1110 and 01 1111 1111 for the LTC1852.

These adjustments as well as the factory trims affect all

channels. The channel-to-channel offset and gain error

matching are guaranteed by design to meet the speciﬁca-

tions in the Converter Characteristics table.

OUTPUT DATA FORMAT

The LTC1852/LTC1853 have a 14 bit/16-bit parallel out-

put. The output word normally consists of a 10-bit/12-bit

conversion result data word and a 4-bit address (three

address bits A2OUT, A1OUT, A0OUT and the DIFFOUT bit).

The output drivers are enabled when RD is low provided

the chip is selected (CS is low). All 14/16 data output pins

and BUSY are supplied by OVDD and OGND to allow easy

interface to 3V or 5V digital logic.

The data format of the conversion result is automatically

selected and determined by the UNI/BIP input pin. If

the UNI/BIP pin is low indicating a unipolar input span

(0 – REFCOMP assuming PGA = 1), the format for the

data is straight binary with 1 LSB = FS/4096 (1mV for

REFCOMP=4.096V).FortheLTC1853and1LSB=FS/1024

(4mV for REFCOMP = 4.096V) for the LTC1852.

If the UNI/BIP pin is high indicating a bipolar input span

(± REFCOMP/2 for PGA = 1), the format for the data is two’s

complement binary with 1 LSB = [(+FS) – (–FS)]/4096

(1mV for REFCOMP = 4.096V). For the LTC1853 and 1LSB

= [(+FS) – (–FS)]/1024 (4mV for REFCOMP = 4.096V) for

the LTC1852.

In both cases, the code transitions occur midway be-

tween successive integer LSB values (i.e., –FS + 0.5LSB,

–FS + 1.5LSB, ... –1.5LSB, –0.5LSB, 0.5LSB, 1.5LSB, ...

FS – 1.5LSB, FS – 0.5LSB).

The three most signiﬁcant bits of the data word (D11, D10

and D9 for the LTC1853; D9, D8 and D7 for the LTC1852)

also function as output bits when reading the contents of

the programmable sequencer. During readback, a 7-bit

status word (S6-S0) containing the contents of the cur-

rent sequencer location is available when RD is low. The

individual bits of the status word are outlined in Figure 1.

During readback, the D8 to D0 pins (LTC1853) or D6 to

D0 pins (LTC1852) remain high impedance irrespective

of the state of RD.

Figure 1. Readback Status Word

Unipolar Transfer Characteristic

(UNI/BIP = 0)

Bipolar Transfer Characteristic

(UNI/BIP = 1)

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