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LTC1853 数据表(PDF) 5 Page - Linear Technology

部件名 LTC1853
功能描述  8-Channel, 10-Bit/12-Bit, 400ksps, Low Power, Sampling ADCs
PDF  24 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC1853 数据表(HTML) 5 Page - Linear Technology

  LTC1853_15 Datasheet HTML 1Page - Linear Technology LTC1853_15 Datasheet HTML 2Page - Linear Technology LTC1853_15 Datasheet HTML 3Page - Linear Technology LTC1853_15 Datasheet HTML 4Page - Linear Technology LTC1853_15 Datasheet HTML 5Page - Linear Technology LTC1853_15 Datasheet HTML 6Page - Linear Technology LTC1853_15 Datasheet HTML 7Page - Linear Technology LTC1853_15 Datasheet HTML 8Page - Linear Technology LTC1853_15 Datasheet HTML 9Page - Linear Technology Next Button
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LTC1852/LTC1853
5
18523fa
POWER REQUIREMENTS The ● denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VDD
Analog Positive Supply Voltage
(Note 10)
●
2.7
5.5
V
OVDD
Output Positive Supply Voltage
(Note 10)
●
2.7
5.5
V
IDD
Positive Supply Current
VDD = OVDD = 5V, fS = 400kHz
VDD = OVDD = 2.7V, fS = 250kHz
●
●
2
0.83
3
1.33
mA
mA
PDISS
Power Dissipation
VDD = OVDD = 5V, fS = 400kHz
VDD = OVDD = 2.7V, fS = 250kHz
●
●
10
2.25
15
4
mW
mW
IDDPD
Power Down Positive Supply Current
Nap Mode
Sleep Mode
SHDN = Low, CS = Low
SHDN = Low, CS = High
0.5
20
mA
μA
Power Down Power Dissipation
Nap Mode
Sleep Mode
VDD = VDD = OVDD = 5V, fS = 400kHz
SHDN = Low, CS = Low
SHDN = Low, CS = High
2.5
0.1
mW
mW
Power Down Power Dissipation
Nap Mode
Sleep Mode
VDD = VDD = OVDD = 3V, fS = 250kHz
SHDN = Low, CS = Low
SHDN = Low, CS = High
1.5
0.06
mW
mW
TIMING CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fSAMPLE(MAX)
Maximum Sampling Frequency
VDD = 5.5V
VDD = 2.7V
●
●
400
250
kHz
kHz
Acquisition + Conversion
VDD = 5.5V
VDD = 2.7V
●
●
2.5
4.0
μs
μs
tCONV
Conversion Time
VDD = 5.5V
VDD = 2.7V
●
●
2.0
3.5
μs
μs
tACQ
Acquisition Time
(Note 13)
●
150
ns
t1
CS to RD Setup Time
(Notes 9, 10)
●
0ns
t2
CS to CONVST Setup Time
(Notes 9, 10)
●
10
ns
t3
CS to SHDN Setup Time
(Notes 9, 10)
200
ns
t4
SHDN to CONVST Wake-Up Time
Nap Mode (Note 10)
Sleep Mode (Note 10)
200
10
ns
ms
t5
CONVST Low Time
(Notes 10, 11)
●
50
ns
t6
CONVST to BUSY Delay
CL = 25pF
●
10
60
ns
ns
t7
Data Ready Before BUSY
●
20
15
35
ns
ns
t8
Delay Between Conversions
(Note 10)
●
50
ns
t9
Wait Time RD After BUSY
●
–5
ns
t10
Data Access Time After RD
CL = 25pF
●
20
35
45
ns
ns
CL = 100pF
●
25
45
60
ns
ns
t11
BUS Relinquish Time
0°C to 70°C
– 40°C to 85°C
●
●
10
30
35
40
ns
ns
ns
t12
RD Low Time
●
t10
ns



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