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LTC1853 数据表(PDF) 6 Page - Linear Technology |
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LTC1853 数据表(HTML) 6 Page - Linear Technology |
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6 / 24 page ![]() LTC1852/LTC1853 6 18523fa TIMING CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values are with respect to ground with OGND and GND wired together unless otherwise noted. Note 3: When these pin voltages are taken below ground or above VDD, they will be clamped by internal diodes. This product can handle input currents of 100mA below ground or above VDD without latchup. Note 4: When these pin voltages are taken below ground, they will be clamped by internal diodes. This product can handle input currents of 100mA below ground without latchup. These pins are not clamped to VDD. Note 5: VDD = 5V, fSAMPLE = 400kHz, tr = tf = 2ns unless otherwise specified. Note 6: Linearity, offset and full-scale specifications apply for a single- ended input on any channel with COM grounded. Note 7: Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual end points of the transfer curve. The deviation is measured from the center of the quantization band. Note 8: Bipolar offset is the offset voltage measured from – 0.5LSB when the output code flickers between 1111 1111 1111 and 0000 0000 0000. For the LTC1853 and between 11 1111 1111 and 00 0000 0000 for the LTC1852. Note 9: Guaranteed by design, not subject to test. Note 10: Recommended operating conditions. Note 11: The falling CONVST edge starts a conversion. If CONVST returns high at a critical point during the conversion it can create small errors. For the best results, ensure that CONVST returns high either within 400ns after the start of the conversion or after BUSY rises. Note 12: The analog input range is determined by the voltage on REFCOMP. The gain error specification is tested with an external 4.096V but is valid for any value of REFCOMP greater than 2V and less than (VDD – 0.5V.) Note 13: MUX address is updated immediately after BUSY falls. 1.0 0.5 0 –0.5 –1.0 0 4096 CODE 1852 F02 0 –20 –40 –60 –80 –100 –120 0 200 FREQUENCY (kHz) 1852 F03 Differential Linearity 8192 Point FFT with fIN = 39.599kHz SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS t13 CONVST High Time (Note 10) ● 50 ns t14 Latch Setup Time (Note 10) ● 10 ns t15 Latch Hold Time (Notes 9, 10) ● 10 ns t16 WR Low Time (Note 10) ● 50 ns t17 WR High Time (Note 10) ● 50 ns t18 M1 to M0 Setup Time (Notes 9, 10) ● 10 ns t19 M0 to BUSY Delay M1 High 20 ns t20 M0 to WR (or RD) Setup Time (Notes 9, 10) ● t19 ns t21 M0 High Pulse Width (Note 10) ● 50 ns t22 RD High Time Between Readback Reads (Note 10) ● 50 ns t23 Last WR (or RD) to M0 (Note 10) ● 10 ns t24 M0 to RD Setup Time (Notes 9, 10) ● t19 ns t25 M0 to CONVST (Note 10) ● t19 ns t26 Aperture Delay – 0.5 ns t27 Aperture Jitter 2psRMS TYPICAL PERFORMANCE CHARACTERISTICS |
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