ICS831752I Data Sheet

CLOCK SWITCH FOR ATCA/AMC AND PCIe APPLICATIONS

ICS831752AGI REVISION A JUNE 28, 2012

9

©2012 Integrated Device Technology, Inc.

Recommendations for Unused Input Pins

Inputs:

LVCMOS Control Pins

All control pins have internal pullups or pulldowns; additional

resistance is not required but can be added for additional protection.

A 1k

Ω resistor can be used.

CLK/nCLK Inputs

For applications not requiring the use of the differential input, both

CLK and nCLK can be left floating. Though not required, but for

additional protection, a 1k

Ω resistor can be tied from CLK to ground.

FCLK/nFCLK Pins

In case FCLK/nFCLK are unused, one of the following two

configurations can be used: either FCLK/nFCLK are configured as an

output (DIR_SEL = 1) and left floating, or FCLK/nFCLK are

configured as an input (DIR_SEL = 0). In this case 1k

required on FCLK and 1k

Wiring the Differential Input to Accept Single-Ended Levels

Figure 2 shows how a differential input can be wired to accept single

bias resistors R1 and R2. The bypass capacitor (C1) is used to help

filter noise on the DC bias. This bias circuit should be located as close

to the input pin as possible. The ratio of R1 and R2 might need to be

This configuration requires that the sum of the output impedance of

the driver (Ro) and the series resistance (Rs) equals the transmission

line impedance. In addition, matched termination at the input will

attenuate the signal in half. This can be done in one of two ways.

First, R3 and R4 in parallel should equal the transmission line

impedance. For most 50

Ω applications, R3 and R4 can be 100Ω. The

values of the resistors can be increased to reduce the loading for

slower and weaker LVCMOS driver. When using single-ended

signaling, the noise rejection benefits of differential signaling are

reduced. Even though the differential input can handle full rail

LVCMOS signaling, it is recommended that the amplitude be

reduced. The datasheet specifies a lower differential amplitude,

however this only applies to differential signals. For single-ended

of the recommended components might not be used, the pads

should be placed in the layout. They can be utilized for debugging

purposes. The datasheet specifications are characterized and

guaranteed by using a differential signal.

Figure 2. Recommended Schematic for Wiring a Differential Input to Accept Single-ended Levels