PIC16C925T-SSLASHCL datasheet(31/182 Pages) MICROCHIP

31 / 182 page

 2001 Microchip Technology Inc.

Preliminary

DS39544A-page 29

PIC16C925/926

4.0

I/O PORTS

Some pins for these ports are multiplexed with an alter-

nate function for the peripheral features on the device.

In general, when a peripheral is enabled, that pin may

not be used as a general purpose I/O pin.

4.1

PORTA and TRISA Register

The RA4/T0CKI pin is a Schmitt Trigger input and an

open drain output. All other RA port pins have TTL

input levels and full CMOS output drivers. All RA pins

have data direction bits (TRISA register), which can

configure these pins as output or input.

Setting a bit in the TRISA register puts the correspond-

ing output driver in a Hi-Impedance mode. Clearing a

bit in the TRISA register puts the contents of the output

latch on the selected pin.

Reading the PORTA register reads the status of the

pins, whereas writing to it will write to the port latch. All

write operations are read-modify-write operations.

Therefore, a write to a port implies that the port pins are

read, this value is modified, and then written to the port

data latch.

Pin RA4 is multiplexed with the Timer0 module clock

input to become the RA4/T0CKI pin. The other PORTA

pins are multiplexed with analog inputs and the analog

VREF input. The operation of each pin is selected by

clearing/setting the control bits in the ADCON1 register

(A/D Control Register1).

The TRISA register controls the direction of the RA

pins, even when they are being used as analog inputs.

The user must ensure the bits in the TRISA register are

maintained set when using them as analog inputs.

EXAMPLE 4-1:

INITIALIZING PORTA

FIGURE 4-1:

BLOCK DIAGRAM OF

PINS RA3:RA0 AND RA5

FIGURE 4-2:

BLOCK DIAGRAM OF

RA4/T0CKI PIN

Note:

On a Power-on Reset, these pins are con-

figured as analog inputs and read as ’0’.

BCF

STATUS, RP0

; Select Bank0

BCF

STATUS, RP1

CLRF

PORTA

; Initialize PORTA

BSF

STATUS, RP0

; Select Bank1

MOVLW

0xCF

; Value used to

; initialize data

; direction

MOVWF

TRISA

; Set RA<3:0> as inputs

; RA<5:4> as outputs

; RA<7:6> are always

; read as ’0’.

Data

Bus

Port

TRIS

Data Latch

TRIS Latch

RD Port

VSS

VDD

I/O pin(1)

Note 1: I/O pins have protection diodes to VDD and VSS.

Analog

Input Mode

TTL

Input

Buffer

To A/D Converter

TRIS

Data

Bus

Port

TRIS

RD Port

Data Latch

TRIS Latch

Schmitt

Trigger

Input

Buffer

VSS

I/O pin(1)

TMR0 Clock Input

TRIS

Note 1: I/O pin has protection diodes to VSS only.

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