PIC16C925T-SSLASHCL datasheet(46/182 Pages) MICROCHIP

46 / 182 page

PIC16C925/926

DS39544A-page 44

Preliminary

 2001 Microchip Technology Inc.

5.3

Prescaler

An 8-bit counter is available as a prescaler for the

Timer0 module, or as a postscaler for the Watchdog

Timer (Figure 5-6). For simplicity, this counter is being

referred to as “prescaler” throughout this data sheet.

Note that the prescaler may be used by either the

Timer0 module or the WDT, but not both. Thus, a pres-

caler assignment for the Timer0 module means that

there is no prescaler for the Watchdog Timer, and vice-

versa.

The PSA and PS2:PS0 bits (OPTION<3:0>) determine

the prescaler assignment and prescale ratio.

When assigned to the Timer0 module, all instructions

writing to the TMR0 register (e.g. CLRF 1, MOVWF 1,

BSF

1,x

....etc.) will clear the prescaler count. When

assigned to WDT, a CLRWDT instruction will clear the

prescaler count along with the Watchdog Timer. The

prescaler is not readable or writable.

FIGURE 5-6:

BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER

Note:

Writing to TMR0 when the prescaler is

assigned to Timer0, will clear the prescaler

count, but will not change the prescaler

assignment.

RA4/T0CKI

T0SE

CLKOUT (= FOSC/4)

SYNC

Cycles

TMR0 reg

8-bit Prescaler

8 - to - 1 MUX

M U X

Watchdog

Timer

PSA

WDT

Time-out

PS2:PS0

Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION<5:0>).

PSA

WDT Enable bit

Data Bus

Set Flag bit TMR0IF

on Overflow

PSA

T0CS

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