PIC16C925T-SSLASHCL datasheet(60/182 Pages) MICROCHIP

60 / 182 page

PIC16C925/926

DS39544A-page 58

Preliminary

 2001 Microchip Technology Inc.

TABLE 8-3:

REGISTERS ASSOCIATED WITH TIMER1, CAPTURE AND COMPARE

TABLE 8-4:

REGISTERS ASSOCIATED WITH PWM AND TIMER2

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

Power-on

Reset

Value on

all other

RESETS

0Bh, 8Bh,

10Bh, 18Bh

INTCON

GIE

PEIE

TMR0IE

INTE

RBIE

TMR0IF

INTF

RBIF

0000 000x 0000 000u

0Ch

PIR1

LCDIF

ADIF

—

SSPIF

CCP1IF

TMR2IF

TMR1IF

00-- 0000 00-- 0000

8Ch

PIE1

LCDIE

ADIE

—

SSPIE

CCP1IE

TMR2IE

TMR1IE 00-- 0000 00-- 0000

87h

TRISC

—

PORTC Data Direction Control Register

--11 1111 --11 1111

0Eh

TMR1L

Holding register for the Least Significant Byte of the 16-bit TMR1 Register

xxxx xxxx uuuu uuuu

0Fh

TMR1H

Holding register for the Most Significant Byte of the 16-bit TMR1 Register

xxxx xxxx uuuu uuuu

10h

T1CON

—

T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu

15h

CCPR1L

Capture/Compare/PWM1 (LSB)

xxxx xxxx uuuu uuuu

16h

CCPR1H

Capture/Compare/PWM1 (MSB)

xxxx xxxx uuuu uuuu

17h

CCP1CON

—

CCP1X

CCP1Y

CCP1M3

CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000

Legend:

= unknown, u = unchanged, - = unimplemented locations read as '0’. Shaded cells are not used in these modes.

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

Power-on

Reset

Value on

all other

RESETS

0Bh, 8Bh,

10Bh, 18Bh

INTCON

GIE

PEIE

TMR0IE

INTE

RBIE

TMR0IF

INTF

RBIF

0000 000x

0000 000u

0Ch

PIR1

LCDIF

ADIF

—

SSPIF

CCP1IF

TMR2IF

TMR1IF

00-- 0000

8Ch

PIE1

LCDIE

ADIE

—

SSPIE

CCP1IE

TMR2IE

TMR1IE

00-- 0000

87h

TRISC

—

PORTC Data Direction Control Register

--11 1111

11h

TMR2

Timer2 Module Register

0000 0000

92h

PR2

Timer2 Module Period Register

1111 1111

12h

T2CON

—

TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000

15h

CCPR1L

Capture/Compare/PWM1 (LSB)

xxxx xxxx

uuuu uuuu

16h

CCPR1H

Capture/Compare/PWM1 (MSB)

xxxx xxxx

uuuu uuuu

17h

CCP1CON

—

CCP1X

CCP1Y

CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000

Legend:

= unknown, u = unchanged, - = unimplemented locations read as '0’. Shaded cells are not used in this mode.

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