PIC16C925T-SSLASHCL datasheet(114/182 Pages) MICROCHIP

114 / 182 page

PIC16C925/926

DS39544A-page 112

Preliminary

 2001 Microchip Technology Inc.

FIGURE 12-14:

WAKE-UP FROM SLEEP THROUGH INTERRUPT

12.9

Program Verification/Code

Protection

If the code protection bit(s) have not been pro-

grammed, the on-chip program memory can be read

out for verification purposes.

12.10 ID Locations

Four memory locations (2000h - 2003h) are designated

as ID locations, where the user can store checksum or

other code identification numbers. These locations are

not accessible during normal execution, but are read-

able and writable during program/verify. It is recom-

mended that only the four Least Significant bits of the

ID location are used.

12.11

In-Circuit Serial Programming

PIC16CXXX microcontrollers can be serially pro-

grammed while in the end application circuit. This is

simply done with two lines for clock and data, and three

other lines for power, ground, and the programming

voltage. This allows customers to manufacture boards

with unprogrammed devices, and then program the

microcontroller just before shipping the product. This

also allows the most recent firmware or a custom firm-

ware to be programmed.

The device is placed into a Program/Verify mode by

holding the RB6 and RB7 pins low, while raising the

MCLR (VPP) pin from VIL to VIHH (see programming

specification). RB6 becomes the programming clock

and RB7 becomes the programming data. Both RB6

and RB7 are Schmitt Trigger inputs in this mode.

After RESET, to place the device into Program/Verify

mode, the program counter (PC) is at location 00h. A

6-bit command is then supplied to the device. Depend-

ing on the command, 14-bits of program data are then

supplied to or from the device, depending if the com-

mand was a load or a read. For complete details of

serial programming, please refer to the PIC16C6X/7X

Programming Specifications (Literature #DS30228).

FIGURE 12-15:

TYPICAL IN-CIRCUIT

SERIAL PROGRAMMING

CONNECTION

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

OSC1

CLKOUT(4)

INT pin

INTF Flag

(INTCON<1>)

GIE bit

(INTCON<7>)

INSTRUCTION FLOW

Instruction

Fetched

Instruction

Executed

PC+1

PC+2

Inst(PC) = SLEEP

Inst(PC - 1)

Inst(PC + 1)

SLEEP

Processor in

SLEEP

Interrupt Latency

(Note 2)

Inst(PC + 2)

Inst(PC + 1)

Inst(0004h)

Inst(0005h)

Inst(0004h)

Dummy cycle

PC + 2

0004h

0005h

Dummy cycle

TOST(2)

PC+2

Note

XT, HS or LP oscillator mode assumed.

TOST = 1024TOSC (drawing not to scale) This delay will not be there for RC osc mode.

GIE = ’1’ assumed. In this case after wake-up, the processor jumps to the interrupt routine.

If GIE = ’0’, execution will continue in-line.

CLKOUT is not available in these osc modes, but shown here for timing reference.

Note:

Microchip does not recommend code pro-

tecting windowed devices.

External

Connector

Signals

To Normal

Connections

To Normal

Connections

PIC16CXXX

VDD

VSS

MCLR/VPP

RB6

RB7

+5V

VPP

CLK

Data I/O

VDD

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