PIC16C925T-SSLASHCL datasheet(126/182 Pages) MICROCHIP

126 / 182 page

PIC16C925/926

DS39544A-page 124

Preliminary

 2001 Microchip Technology Inc.

IORWF

Inclusive OR W with f

Syntax:

[ label ]

IORWF

f [,d]

Operands:

≤ f ≤ 127

∈ [0,1]

Operation:

(W).OR. (f)

→ (destination)

Status Affected:

Encoding:

0100

dfff

ffff

Description:

Inclusive OR the W register with reg-

ister ’f’. If ’d’ is 0, the result is placed

in the W register. If ’d’ is 1, the result

is placed back in register ’f’.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

’f’

Process

data

Write to

destination

Example

IORWF

RESULT, 0

Before Instruction:

RESULT

0x13

0x91

After Instruction:

RESULT

0x13

0x93

MOVF

Move f

Syntax:

[ label ]

MOVF f [,d]

Operands:

≤ f ≤ 127

∈ [0,1]

Operation:

(f)

→ (destination)

Status Affected:

Encoding:

1000

dfff

ffff

Description:

The contents of register f are moved

to a destination dependant upon the

status of d. If d = 0, the destination is

W register. If d = 1, the destination is

file register f itself. d = 1 is useful to

test a file register, since status flag Z

is affected.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

’f’

Process

data

Write to

destination

Example

MOVF

FSR,

After Instruction:

value in FSR register

1 if W = 0

MOVLW

Move Literal to W

Syntax:

[ label ]

MOVLW k

Operands:

≤ k ≤ 255

Operation:

→ (W)

Status Affected:

None

Encoding:

00xx

kkkk

Description:

The eight-bit literal ’k’ is loaded into

W register. The don’t cares will

assemble as 0’s.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

literal ’k’

Process

data

Write to

Example

MOVLW

0x5A

After Instruction:

0x5A

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