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AS5601-ASOT 数据表(PDF) 16 Page - ams AG |
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AS5601-ASOT 数据表(HTML) 16 Page - ams AG |
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16 / 43 page ![]() Page 16 ams Datasheet Document Feedback [v1-02] 2014-Oct-29 AS5601 − Detailed Description AS5601 Slave Modes Slave Receiver Mode (Write Mode) Serial data and clock are received through SDA and SCL. Each byte is followed by an acknowledge bit or by a NACK depending on whether the address pointer selects a valid address. START and STOP conditions are recognized as the beginning and end of a bus transaction. The slave address byte is in the first byte received after the START condition. The 7-bit AS5601 address is 0x36 (0110110 in binary). The 7-bit slave address is followed by the direction bit (R/W), which, for a write, is 0 (low). After receiving and decoding the slave address byte, the slave device drives an acknowledge on SDA. After the AS5601 acknowledges the slave address and write bit, the master transmits a register address (word address) to the AS5601. This is loaded into the address pointer on the AS5601. If the address is a valid readable address, the AS5601 answers by sending an acknowledge (A bit low). If the address pointer selects an invalid address, a NACK is sent (A bit high). The master may then transmit zero or more bytes of data. If the address pointer selects an invalid address, the received data are not stored. The address pointer will increment after each byte transferred whether or not the address is valid. If the address pointer reaches a valid position again, the AS5601 answers with an acknowledge and stores the data. The master generates a STOP condition to terminate the write transaction. Figure 16: Data Write (Slave Receiver Mode) S 0110110 0 A XXXXXXXX A XXXXXXXX A XXXXXXXX A S – Start A – Acknowledge (ACK) Data transferred: X+1 Bytes + Acknowledge P – Stop P <Slave address> <Word address (n)> <Data(n)> <Data(n+X)> XXXXXXXX A <Data(n+1)> |
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