USB5533B datasheet(29/71 Pages) MICROCHIP

29 / 71 page

 2012 - 2015 Microchip Technology Inc.

DS00001680C-page 29

USB5533B

5.2.21.1

USB 2.0 HS Disable

This setting disables USB High-Speed operation on the entire USB 2.0 hub.

5.2.21.2

USB 2.0 MTT Disable

This setting disables the Multi-TT operation on the entire USB 2.0 hub.

5.2.21.3

USB 2.0 FS EOP Disable

This setting disables the End Of Packet (EOP) generation of End Of Frame 1 (EOF1) when in Full-Speed mode.

5.2.22

UUID OVERRIDE

These controls allow the user to override the 128-bit UUID value within the device (set at the Microchip Factory as a

unique value for each device). By USB Specification, if multiple devices are connected within one system as a single

Compound Device, all UUID (within the BOS descriptor) should be set the same.

5.3

One-Time Programmable (OTP) Memory

The device contains an internal One-Time Programmable memory, which allows various configuration settings to be

configured for the end application. This memory requires a configuration to be created through the Microchip ProTouch

tool or by a Microchip FAE. The ProTouch tool then allows programming of this block over a USB 2.0 connection to a

Microsoft Windows Host.

There is also an option to support OTP programming via the SMBus interface. However, this method of OTP program-

ming is not preferred. Please contact your local Microchip FAE for more information on OTP programming via SMBus.

5.3.1

CONFIGURATION FILE CREATION

For information on configuration file creation, refer to the ProTouch tool.

5.4

External SPI

The device supports operation utilizing an external SPI Flash or ROM. In normal operation, the internal microcontroller

runs from the internal ROM. If an external SPI memory is implemented, the full Firmware image must be loaded into the

SPI.

When using an external SPI memory, there are two options available. The configuration can be loaded from the internal

OTP, or the internal OTP can be ignored and the configuration file loaded into the SPI memory.

Please contact your Microchip FAE for more information on how to obtain access to an external SPI memory image and

how to support the different configuration options.

For information on SPI interface connections, refer to Section 4.1, "SPI Interface," on page 13.

5.4.1

CONFIGURATION FILE CREATION

For information on configuration file creation, refer to the ProTouch tool.

5.5

SMBus Slave Interface

Typical block write and block read protocols are shown in Figure 5-6 and Figure 5-5. SMBus RAM buffer offset accesses

are performed using 7-bit slave addressing, a 16-bit SMBus RAM buffer offset field (for legacy and advanced modes,

respectively), and an 8-bit data field. The shading shown in the figures during a read or write indicates the hub is driving

data on the SM_DAT line; otherwise, host data is on the SM_DAT line.

The SMBus slave address assigned to the hub (0101100b or 0101101b) allows it to be identified on the SMBus. The

SMBus RAM buffer offset field is the internal offset in SMBus RAM to be accessed. The data field is the data that the

host is attempting to read/write from/to the SMBus RAM buffer.

For information on connecting the SMBus slave interface to a host, refer to Section 4.2, "SMBus Slave Interface," on

page 18.

Note:

Data bytes are transferred MSB first.

USB5533B 数据表(PDF) 29 Page - Microchip Technology

USB5533B 数据表(HTML) 29 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71

数据表下载